Finite Element Simulation Model for High Temperature 4H-SiC Devices

Abstract

In the last decade, or so, many prototype Silicon Carbide devices and circuits have been demonstrated which have surpassed the performance of Silicon for the ability to function in extreme environments. However, the commercialisation of SiC technology now demands high performance and energy efficient miniaturised devices and circuits which can operate on the limited power resources available in harsh and hot hostile environments. This leads to refining, experimenting and perhaps re-designing devices which can rightly claim their share in the current Si dominant market. Consequently, there is a need for accurate simulation models for device engineers to understand device behaviour, examine performance trade-offs and verify the manufacturability of the design. This paper reports the first comprehensive study on the development and validation of high temperature 4H-SiC Technology Computer Aided Design (TCAD) Finite Element simulation model for low power applications. The model is based on 4H-SiC physical and material properties and is validated by high temperature 4H-SiC lateral JFET data, fabricated and characterised by our group at Newcastle University.

Complementary JFET Logic for Low-Power Applications in Extreme Environments

“…Currently, one of the biggest challenges faced by SiC technology is high static power dissipation at 500 °C (~10 -3 W) [1]. Consequently, there is a need for low power, miniturised logic devices capable of achieving high circuit complexities at high temperatures [1][2][3]. This paper reports for the first time, to the author's knowledge, logic circuitry based on 4H-SiC CJFET technology.…”

“…Like CMOS, CJFET based logic gates are formed by cascading enhancement mode n-and p-JFETs. These n-and p-JFETs have been previously optimised in [2], using calibrated high temperature technology computer aided design (TCAD) finite element (FE) simulation model, described in [3].…”