Fin and Recess-Channel Metal Oxide Semiconductor Field Effect Transistor for Sub-50 nm Dynamic Random Access Memory Cell

Abstract

In this paper, we propose a novel fin and recess-channel metal oxide semiconductor field effect transistor (MOSFET) for sub-50 nm dynamic random access memory (DRAM) cell application. Also, it is compared with the recess-channel-array transistor (RCAT). In the proposed device, a silicon fin region is added to the recessed channel MOSFET. Thanks to the additional current path through the silicon fin with the wide source/drain width, the FiReFET shows excellent current drivability. To reduce gate-induced drain leakage (GIDL) current, we adopt an underlapped device structure. As a result, it is found that the optimized underlap structure helps to prevent the OFF state leakage current induced by the increase of the gate work function.