Fault-based alternate test of RF components

Akbay, S.S.; Chatterjee, Abhijit

doi:10.1109/iccd.2007.4601947

Cited by 23 publications

(15 citation statements)

References 16 publications

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“…In [5] a genetic algorithm is used to carefully craft a test stimulus such that the test response will be highly correlated with specification performances, reducing prediction error. In [2] the authors employ guard-banding to judiciously apply full specification test to devices where pass/fail outcomes are uncertain.…”

Section: Prior Workmentioning

confidence: 99%

PPM-accuracy Error Estimates for Low-Cost Analog Test: A Case Study

Kupp

Stratigopoulos

Drineas

et al. 2011

2011 IEEE 17th International Mixed-Signals, Sensors and Systems Test Workshop

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Over the past decade, interest has increased in leveraging low-cost "alternate" test methods as a drop-in replacement for testing analog and RF devices. The current practice for testing such devices, known as specification test, can be very expensive by comparison. By substituting less-costly alternate tests for specification test, substantial test cost reduction can be achieved. Despite this promised cost reduction, the testing community has been reluctant to adopt such alternate test methods in industrial settings, as the error incurred by alternate test can be quite difficult to capture. Estimating the expected test error metrics early in the fabrication process is, therefore, extremely desirable. In this work, we present a case study in which we investigate the reliability of kernel density estimation as a means of providing such early estimates of alternate test error. We also introduce the novel application of Laplacian score feature selection to identify key subsets of alternate tests. With these tools we are able to dramatically reduce the number of alternate tests applied, as well as predict test escape and yield loss error metrics within about 0.5% of their true values when evaluated on an industrial dataset with more than 1 million devices.

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Section: Prior Workmentioning

confidence: 99%

PPM-accuracy Error Estimates for Low-Cost Analog Test: A Case Study

Kupp

Stratigopoulos

Drineas

et al. 2011

2011 IEEE 17th International Mixed-Signals, Sensors and Systems Test Workshop

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“…Specifically, the training set of devices for developing the mapping using supervised learning must include devices across as many process corners as possible. In practice, a defect filter [6,7] is used to first determine if the DUT specifications can be predicted accurately from its response (the specifications of devices outside the performance domain of devices in the training set are not predicted accurately by the alternate test procedure). If not, then standard specification tests cation…”

Section: Figure 1: Alternate Test Frameworkmentioning

confidence: 99%

Rapid Radio Frequency Amplitude and Phase Distortion Measurement Using Amplitude Modulated Stimulus

Sen

Devarakond

Chatterjee

2010

2010 19th IEEE Asian Test Symposium

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Testing of RF circuits for gain, nonlinearity and distortion specification generally requires the use of multiple test measurements and long test times contributing to increased test cost. Prior RF test methods have suffered from significant test calibration effort (training for supervised learners) when using compact tests or from increased test time due to direct specification measurement. In this paper, a novel RF test methodology is developed that: (a) allows RF devices to be tested for amplitude and phase distortion in test time comparable to what can be achieved using supervised learning techniques while retaining the accuracy of direct specification measurement, (b) allows multiple RF specifications to be determined concurrently from a single data acquisition and (c) does not require any training for accurate test specification computation. The proposed method based on amplitude modulated RF stimulus driven RF distortion extraction is shown to give excellent results across common RF performance metrics (RMS error <1.4%) while providing ~10× improvements in test time compared to previous methods.

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“…slow convergence, low classification accuracy), which need to be improved. Currently, the SVDD is focused on by the three aspects [18][19][20][21][22][23]: (1) the deformation of the normal SVDD model, such as density-induced SVDD; (2) optimum selection method of training set and increase of computation speed, such as incremental leaning method; and (3) the selection of SVDD parameters, including the kernel function and kernel parameters, such as cross validation and path algorithm.…”

Section: Introductionmentioning

confidence: 99%

Fault diagnosis of analog circuit based on a second map SVDD

Jiang

Wang

Luo

2015

Analog Integr Circ Sig Process

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To improve the diagnosis accuracy of analog circuit, this paper presents a second map support vector data description (SM-SVDD) method, which uses an anomalous and close surface instead of a hypesphere to describe the target data. The fault classifier is constructed by a SM SVDD algorithm to realize analog circuit fault diagnosis. Experimental results on two typical circuits confirm that the proposed method is effective in analog circuit fault diagnosis with good accuracy, and the performance surpasses other intelligent diagnosis methods, such as back propagation neural network, support vector machine and the normal SVDD. The developed method can be applied to other multi-classifier in electronic applications.

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Fault-based alternate test of RF components

Cited by 23 publications

References 16 publications

PPM-accuracy Error Estimates for Low-Cost Analog Test: A Case Study

PPM-accuracy Error Estimates for Low-Cost Analog Test: A Case Study

Rapid Radio Frequency Amplitude and Phase Distortion Measurement Using Amplitude Modulated Stimulus

Fault diagnosis of analog circuit based on a second map SVDD

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