Fault-Aware Performance Assessment Approach for Embedded Networks

Malburg, Jan; Janson, Karl; Raik, Jaan; Dannemann, Frank

doi:10.1109/ddecs.2019.8724670

Cited by 1 publication

(1 citation statement)

References 7 publications

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“…NoC is used for routing between multiple cores as NoC is a flexible, scalable, and efficient interconnection technique [1], [2]. NoC can be used in many applications, such as processing components of an aircraft [3], [4] and processors in computers [5]- [8]. Apart from providing efficient communication, NoCs are expected to be power efficient [9], [10] and ideally free of fault and failures.…”

Section: Introductionmentioning

confidence: 99%

Self-Healing Router Approach for High-Performance Network-on-Chip

Khalil

Eldash

Kumar

et al. 2021

IEEE Open J. Circuits Syst.

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Network-on-Chip (NoC) is used as the communication network in many applications that use multiple cores or Processing Elements (PEs). Routers play a crucial role as connectors since a faulty router can degrade the NoC's performance and cause miscommunication between the network's components. Thus a faulty router may cause the system to fail. To avoid failure in routers in NoCs, a novel self-healing technique is proposed. Self-healing serves to recover hardware faults, and it is defined as the ability of a system to recover from its faults without any external intervention. The proposed self-healing method is to heal faulty routers and their port buffers of faults as they occur. The proposed method uses the neighboring routers of a faulty router for computation. The data packet includes three bits for routing. A neighbor's active router updates these bits according to the destination of the packet. A self-healing block is added inside each router. The proposed method also covers faulty buffers, and it uses active buffers to store the packet of a faulty one. It has been implemented and tested using VHDL and Altera Arria 10 GX FPGA. It has been found to attain improved reliability and Mean Time to Failure (MTTF) at an area overhead of 27%. It has been tested for complex NoC structure, and the results show it is practical, scalable, stable, and robust.INDEX TERMS NoC, self-healing, hardware faults, fault tolerance, neural network, FPGA architecture.

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