Fast switching 4H-SiC V-groove trench MOSFETs with buried P⁺ structure

The optimised design and characterization of 1200 V / 2.0 mΩ cm² 4H-SiC V-groove trench MOSFETs

“…In fact, a high channel mobility of 80 cm 2 V -1 s -1 was attained by using the superior MOS properties as previously reported [4]. Furthermore, we also reported on the V-groove SiC trench MOSFETs (VMOSFETs) with the 4H-SiC{0-33-8} face as the trench sidewalls for the channel region [5] [6]. The VMOSFETs demonstrated a very low specific on-resistance owing to the high channel mobility and the elimination of the JFET resistance.…”

Investigation of the novel 4H SiC trench MOSFET with non-uniform doping floating islands

“…The breakdown occurs in the gate oxide if the maximum electric field in the gate oxide exceeds the reference value of 7MV/cm. 15 The breakdown voltage of the SiC UMOSFET with Gaussian doping floating islands is compared with that with uniform doping floating islands by simulation. Fig.…”

“…The floating island trench gate MOSFET (FITMOS) was put forward to reduce the peak field of the trench M A N U S C R I P T A C C E P T E D ACCEPTED MANUSCRIPT oxide corner for silicon material by Motor in 2005 [13] . It is easier to be realized for SiC by the multiple epitaxial overgrowth process [14]- [15] .…”

SiC Fin-Shaped Gate Trench MOSFET with Integrated Schottky Diode

“…Moreover, the trench gate also brings considerable switching loss, which restricts the dynamic advantage of SiC MOSFET [6]. In order to solve these issues, several solutions are proposed at device level: (1) whole P+ shield region implanted at the bottom of trench [7]; (2) P+ shield region under the recessed source region (double trench MOSFET) [8], (3) buried P+ region in the drift region of trench MOSFET [9], (4) deep P base region using ultra-high implantation energy [10], (5) P+ shield region under the part of trench bottom (asymmetric trench MOSFET) [11], and (6) ground/floating split P+ shield region under the bottom of trench [12]. The fin-shape is introduced to reduce the switching loss directly [13].…”