Experimental Demonstration and Tolerancing of a Large-Scale Neural Network (165 000 Synapses) Using Phase-Change Memory as the Synaptic Weight Element

Burr, Geoffrey W.; Shelby, R. M.; Sidler, Severin; Nolfo, Carmelo di; Jang, Junwon; Boybat, Irem; Shenoy, Rohit S.; Narayanan, Pritish; Virwani, Kumar; Giacometti, Emanuele U.; Kurdi, B. N.; Hwang, Hyunsang

doi:10.1109/ted.2015.2439635

Cited by 755 publications

(551 citation statements)

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“…A generic dot-product engine using memristor arrays for neuromorphic applications was introduced in 2016 18 , and a sparse coding chip that allows lateral neuron inhibition was developed using a 32 × 32 crossbar 31 , followed by the demonstration of principal component analysis though online learning in a 9 × 2 crossbar 32 . Large-scale neural networks have also been demonstrated using phase-change memory, following the same principle 33 . In SNNs, a common learning rule implemented is spike-timing-dependent plasticity -the synapse between two neurons is strengthened when the pre-synaptic neuron spike precedes the postsynaptic neuron spike, and is weakened if the reverse.…”

Section: Nature Electronicsmentioning

confidence: 99%

The future of electronics based on memristive systems

2018

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Section: Nature Electronicsmentioning

confidence: 99%

The future of electronics based on memristive systems

2018

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“…For example, a neuromorphic chip developed by a Defense Advanced Research Projects Agency (DARPA) consortium is designed so that its CMOS-fixed synapses, which require offline training by a separate, conventional computer, could be replaced by matrices of tunable nanosynapses, which would allow the chip to learn [8]. Toward this end, today a huge research effort tries to realize dense arrays of nanodevices called memristors on top of CMOS neurons, because a single memristor can emulate a synapse [14]–[22]. …”

Section: Introductionmentioning

confidence: 99%

Spintronic Nanodevices for Bioinspired Computing

2016

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Bioinspired hardware holds the promise of low-energy, intelligent, and highly adaptable computing systems. Applications span from automatic classification for big data management, through unmanned vehicle control, to control for biomedical prosthesis. However, one of the major challenges of fabricating bioinspired hardware is building ultra-high-density networks out of complex processing units interlinked by tunable connections. Nanometer-scale devices exploiting spin electronics (or spintronics) can be a key technology in this context. In particular, magnetic tunnel junctions (MTJs) are well suited for this purpose because of their multiple tunable functionalities. One such functionality, non-volatile memory, can provide massive embedded memory in unconventional circuits, thus escaping the von-Neumann bottleneck arising when memory and processors are located separately. Other features of spintronic devices that could be beneficial for bioinspired computing include tunable fast nonlinear dynamics, controlled stochasticity, and the ability of single devices to change functions in different operating conditions. Large networks of interacting spintronic nanodevices can have their interactions tuned to induce complex dynamics such as synchronization, chaos, soliton diffusion, phase transitions, criticality, and convergence to multiple metastable states. A number of groups have recently proposed bioinspired architectures that include one or several types of spintronic nanodevices. In this paper, we show how spintronics can be used for bioinspired computing. We review the different approaches that have been proposed, the recent advances in this direction, and the challenges toward fully integrated spintronics complementary metal–oxide–semiconductor (CMOS) bioinspired hardware.

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“…However, this device programming requires the use of extra circuit elements for monitoring the state of the memristor and shaping the spike accordingly. A second proposed approach is to consider multi-memristor synapses (compound synapse with stochastic programming) (Bill and Legenstein, 2014; Burr et al, 2015; Garbin et al, 2015; Prezioso et al, 2015) at the expense of increased area consumption. Only recently some works demonstrated analog behavior in both potentiation and depression without current or voltage control (Park et al, 2013; Covi et al, 2015, 2016; Matveyev et al, 2015; Brivio et al, 2016; Serb et al, 2016).…”

Section: Introductionmentioning

confidence: 99%

Analog Memristive Synapse in Spiking Networks Implementing Unsupervised Learning

et al. 2016

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Emerging brain-inspired architectures call for devices that can emulate the functionality of biological synapses in order to implement new efficient computational schemes able to solve ill-posed problems. Various devices and solutions are still under investigation and, in this respect, a challenge is opened to the researchers in the field. Indeed, the optimal candidate is a device able to reproduce the complete functionality of a synapse, i.e., the typical synaptic process underlying learning in biological systems (activity-dependent synaptic plasticity). This implies a device able to change its resistance (synaptic strength, or weight) upon proper electrical stimuli (synaptic activity) and showing several stable resistive states throughout its dynamic range (analog behavior). Moreover, it should be able to perform spike timing dependent plasticity (STDP), an associative homosynaptic plasticity learning rule based on the delay time between the two firing neurons the synapse is connected to. This rule is a fundamental learning protocol in state-of-art networks, because it allows unsupervised learning. Notwithstanding this fact, STDP-based unsupervised learning has been proposed several times mainly for binary synapses rather than multilevel synapses composed of many binary memristors. This paper proposes an HfO2-based analog memristor as a synaptic element which performs STDP within a small spiking neuromorphic network operating unsupervised learning for character recognition. The trained network is able to recognize five characters even in case incomplete or noisy images are displayed and it is robust to a device-to-device variability of up to ±30%.

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Experimental Demonstration and Tolerancing of a Large-Scale Neural Network (165 000 Synapses) Using Phase-Change Memory as the Synaptic Weight Element

Cited by 755 publications

References 9 publications

The future of electronics based on memristive systems

The future of electronics based on memristive systems

Spintronic Nanodevices for Bioinspired Computing

Analog Memristive Synapse in Spiking Networks Implementing Unsupervised Learning

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