Event-based softcore processor in a biohybrid setup applied to structural plasticity

George, Richard; Mayr, Christian; Indiveri, Giacomo; Vassanelli, Stefano

doi:10.1109/ebccsp.2015.7300664

Cited by 18 publications

(18 citation statements)

References 8 publications

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“…An intriguing method for implementing the synaptors involves using the standardised interface of the Internet, which has been previously trialled for non-synaptic network communications [14][15][16] . We thus instantiated our example of synaptor-linked circuit in a geographically-distributed manner.…”

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confidence: 99%

Memristive synapses connect brain and silicon spiking neurons

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George

et al. 2020

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Brain function relies on circuits of spiking neurons with synapses playing the key role of merging transmission with memory storage and processing. electronics has made important advances to emulate neurons and synapses and brain-computer interfacing concepts that interlink brain and braininspired devices are beginning to materialise. We report on memristive links between brain and silicon spiking neurons that emulate transmission and plasticity properties of real synapses. A memristor paired with a metal-thin film titanium oxide microelectrode connects a silicon neuron to a neuron of the rat hippocampus. Memristive plasticity accounts for modulation of connection strength, while transmission is mediated by weighted stimuli through the thin film oxide leading to responses that resemble excitatory postsynaptic potentials. the reverse brain-to-silicon link is established through a microelectrode-memristor pair. on these bases, we demonstrate a three-neuron brain-silicon network where memristive synapses undergo long-term potentiation or depression driven by neuronal firing rates.

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confidence: 99%

Memristive synapses connect brain and silicon spiking neurons

Serb

Corna

George

et al. 2020

Sci Rep

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“…Neuromorphic systems are usually not a good fit for this learning paradigm, as they contain synaptic matrices fixedly assigned to postsynaptic neurons with only the presynaptic sources to some degree flexible (Noack et al, 2010 ). Rewiring is possible in such a setup, but has to operate postsynaptic-centric and has a fixed number of synapses per postsynaptic neuron (George et al, 2015 ). Memristive crossbar arrays are even worse (Du et al, 2015 ; Mostafa et al, 2015 ), as both pre- and post-synaptic contacts are fixed and all possible synapses of the rewiring scheme need to be physically instantiated, i.e., using less synapses does not reduce the used resources either in silicon area or in power.…”

Section: Discussionmentioning

confidence: 99%

Memory-Efficient Deep Learning on a SpiNNaker 2 Prototype

et al. 2018

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The memory requirement of deep learning algorithms is considered incompatible with the memory restriction of energy-efficient hardware. A low memory footprint can be achieved by pruning obsolete connections or reducing the precision of connection strengths after the network has been trained. Yet, these techniques are not applicable to the case when neural networks have to be trained directly on hardware due to the hard memory constraints. Deep Rewiring (DEEP R) is a training algorithm which continuously rewires the network while preserving very sparse connectivity all along the training procedure. We apply DEEP R to a deep neural network implementation on a prototype chip of the 2nd generation SpiNNaker system. The local memory of a single core on this chip is limited to 64 KB and a deep network architecture is trained entirely within this constraint without the use of external memory. Throughout training, the proportion of active connections is limited to 1.3%. On the handwritten digits dataset MNIST, this extremely sparse network achieves 96.6% classification accuracy at convergence. Utilizing the multi-processor feature of the SpiNNaker system, we found very good scaling in terms of computation time, per-core memory consumption, and energy constraints. When compared to a X86 CPU implementation, neural network training on the SpiNNaker 2 prototype improves power and energy consumption by two orders of magnitude.

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“…The green arrows illustrate a sample spike path from/to the culture. The Ethernet-based interface to the neural cultures is also implemented on the FPGA (George et al, 2015). For simplicity, the clock for the SC circuits is supplied by the FPGA but could in principle also be generated on chip (Eisenreich et al, 2009).…”

Section: Methodsmentioning

confidence: 99%

A Biohybrid Setup for Coupling Biological and Neuromorphic Neural Networks

et al. 2019

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Developing technologies for coupling neural activity and artificial neural components, is key for advancing neural interfaces and neuroprosthetics. We present a biohybrid experimental setting, where the activity of a biological neural network is coupled to a biomimetic hardware network. The implementation of the hardware network (denoted NeuroSoC) exhibits complex dynamics with a multiplicity of time-scales, emulating 2880 neurons and 12.7 M synapses, designed on a VLSI chip. This network is coupled to a neural network in vitro , where the activities of both the biological and the hardware networks can be recorded, processed, and integrated bidirectionally in real-time. This experimental setup enables an adjustable and well-monitored coupling, while providing access to key functional features of neural networks. We demonstrate the feasibility to functionally couple the two networks and to implement control circuits to modify the biohybrid activity. Overall, we provide an experimental model for neuromorphic-neural interfaces, hopefully to advance the capability to interface with neural activity, and with its irregularities in pathology.

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Event-based softcore processor in a biohybrid setup applied to structural plasticity

Cited by 18 publications

References 8 publications

Memristive synapses connect brain and silicon spiking neurons

Memristive synapses connect brain and silicon spiking neurons

Memory-Efficient Deep Learning on a SpiNNaker 2 Prototype

A Biohybrid Setup for Coupling Biological and Neuromorphic Neural Networks

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