Evaluation of a New Hybrid Technique Based on DTMOS and PFA to Improve Supply Voltage and Power Consumption of a Class-AB Amplifier

Abstract

In this paper, two useful techniques of Dynamic Threshold Voltage MOSFET (DTMOS) and Positive FeedbackAmplifier (PFA) are investigated separately and are applied simultaneously on a Class-AB Amplifier in the 180 nm CMOS technology. In the first proposed technique, Simulation results show that operating voltage can be limited to ±0.5 V in which the voltage gain and bandwidth are 52.6 dB and 103.51 MHz, respectively. In the second proposed technique, the power consumption is reduced more than 50%, the open-loop gain is enhanced 47% and Common Mode Rejection Ratio (CMRR) improves to 86.5 dB. By applying combination of these two techniques for designing the amplifier, CMRR increases to 92.1 dB and the power consumption reduces to 97 µW with the bandwidth of 59.12 MHz.