Escape routing of mixed-pattern signals based on staggered-pin-array PCBs

Abstract

Escape routing has become a critical issue in high-speed PCB routing. Most of previous work paid attention to either differential-pair escape routing or single-signal escape routing but few considered them together. In this paper, a unified ILP model is used to formulate the problem of escape routing of differential pairs together with single signals (mixed-pattern signals) on staggered pin array. A mixedpattern escape routing algorithm is proposed to solve the problem and a slice-based heuristic method is presented to speed up the algorithm. Experimental results show that the proposed method is very efficient. It can solve all the test cases in short time and improve wire length and chip area by 13.8% and 13.4% respectively compared to traditional pin array. At the same time, the method can increase routability by 16.3% and reduce the wire length by 9.3% compared to a two-stage method.