Engineering crystallinity of atomic layer deposited gate stacks containing ultrathin HfO2 and a Ti-based metal gate: Effects of postmetal gate anneal and integration schemes

Abstract

In this study, the authors examined the effects of different annealing schemes on crystallinity in atomic layer deposition (ALD) grown Ti-containing metal gates and ultrathin ALD HfO 2 high-k dielectric layers, and corresponding electrical results in metal oxide semiconductor capacitor (MOSCAP) devices. The authors investigated the effect of a postmetal deposition anneal (PMA) on the underlying HfO 2 , which was deposited using either a standard ALD process or a process which utilized a cyclical deposition and annealing scheme (termed DADA). The effect of the starting substrate surface, either chemically grown SiO 2 or H-terminated Si, on HfO 2 crystallinity was also studied. For 40 cycle ALD HfO 2 ($32 Å ) with a TiN overlayer, a transition from an amorphous state to a cubic phase was observed with the application of a PMA treatment. Evidence of the orthorhombic phase of HfO 2 with some level of texturing was observed for 40 cycle DADA processed films annealed with a TiN cap. Concomitantly a cubic (111) texture was observed for TiN deposited on DADA processed HfO 2 and subjected to a PMA. Suppression of crystallinity for HfO 2 deposited on H-terminated Si and annealed with a TiN layer was observed which illustrates the need for an adequate nucleation layer for uniform grain growth and increased atomic ordering. The authors also investigated metal gate stacks with a bilayer of TiN overlying Ti which showed reflections from both cubic TiN and hexagonal TiN 0.3 in the as-deposited state and after annealing clear evidence of silicidation (TiSi x ) was observed. In MOSCAP structures with 40 cycle ALD HfO 2 and a TiN overlayer subjected to a PMA, although the cubic phase of HfO 2 was stabilized, there was no associated improvement in device scaling. This study highlights the importance of the initial crystalline state and nucleation of HfO 2 as well as the thermal stability of the capping metal layer material when engineering dielectric layer crystallinity by means of a postmetal cap anneal. For ultrathin HfO 2 integrated in advanced metal oxide semiconductor structures, the benefits of the stabilization of a higher-k phase through postmetal gate anneal may not be fully realized due to increased leakage along grain boundaries or decrease in effective k due to changes in the lower-k interfacial layer.

Dielectrics and Metal Stack Engineering for Multilevel Resistive Random-Access Memory

“…The ALD HfO 2 , Al 2 O 3 processes have been discussed in detail in a number of prior publications. [13][14][15] In the first case, 1 nm of Al 2 O 3 was first deposited followed by 7 nm of HfO 2 . 8 nm Ti, the oxygen scavenging metal, was then deposited by physical vapor deposition (PVD) at room temperature on the dielectric followed by the 50 nm PVD TiN to form the top electrode metal.…”

“…1c, the TiCl 4 based ALD Ti process was deposited at 430 °C in the same reactor (TEL Triase +TM platform) without vacuum break. 14,15 The deposition was carried out in an ultra-high vacuum to limit any background oxidation. The top electrode was patterned using standard photolithography.…”