Energy efficient SVM classifier using approximate computing

Zhou, Yangcan; Lin, Jun; Wang, Zhongfeng

doi:10.1109/asicon.2017.8252658

Cited by 7 publications

(6 citation statements)

References 14 publications

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“…A circuit-level ACT is presented in Ref. [62] that utilizes the use of inexact accumulators for ML algorithms. For instance, the classification phase of the KNN and SVM can be accelerated up to 2× and 3.2× while achieving 30% and 41% power reductions, respectively, when applying algorithmic-level ACTs.…”

Section: Implementation Detailsmentioning

confidence: 99%

Efficient Algorithms for Embedded Tactile Data Processing

Younes¹,

Alameh²,

Ibrahim³

et al. 2022

Electronic Skin

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This chapter presents a survey of the existing algorithms and tasks applied for tactile data processing. The presented algorithms and tasks include machine learning, deep learning, feature extraction, and dimensionality reduction. Moreover, this chapter provides guidelines for selecting appropriate hardware platforms for the algorithm's implementation. The algorithms are compared in terms of computational complexity and hardware implementation requirements. A touch modality classification problem is addressed as a case study: FPGA implementations of two algorithms k-Nearest Neighbor (KNN) and Support Vector Machine (SVM) are detailed and analyzed. Both algorithms provided real-time classification consuming 236 mW and 1.14 W, respectively. Such results can be improved with the use of approximate computing techniques that provide a trade-off between performance and hardware resources usage. Speedups up to 2× and 3.2× along with 30% and 41% power reduction are obtained for KNN and SVM implementations, respectively.

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Section: Implementation Detailsmentioning

confidence: 99%

Efficient Algorithms for Embedded Tactile Data Processing

Younes¹,

Alameh²,

Ibrahim³

et al. 2022

Electronic Skin

View full text Add to dashboard Cite

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“…A very practical approach has been adopted by the authors of [34] and [35]. They replaced multipliers and adders of a support vector machine (SVM) classifier [36] to introduce approximation in it.…”

Section: Approximate Classifiersmentioning

confidence: 99%

“…Authors claim a saving of 14% for silicon area and a saving of 61% for power consumption, while maintaining the same classification accuracy. In Zhou et al [35] a new approximate adder and a new approximate multiplier are proposed. In order to show the full potential of the arithmetic units being proposed, both the exact adder and multiplier needed by an SVM classifier are replaced by approximate versions of them.…”

Section: Approximate Classifiersmentioning

confidence: 99%

Advancing synthesis of decision tree-based multiple classifier systems: an approximate computing case study

2021

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So far, multiple classifier systems have been increasingly designed to take advantage of hardware features, such as high parallelism and computational power. Indeed, compared to software implementations, hardware accelerators guarantee higher throughput and lower latency. Although the combination of multiple classifiers leads to high classification accuracy, the required area overhead makes the design of a hardware accelerator unfeasible, hindering the adoption of commercial configurable devices. For this reason, in this paper, we exploit approximate computing design paradigm to trade hardware area overhead off for classification accuracy. In particular, starting from trained DT models and employing precision-scaling technique, we explore approximate decision tree variants by means of multiple objective optimization problem, demonstrating a significant performance improvement targeting field-programmable gate array devices.

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“…The traditional Ripple-Carry Adder (RCA) has been replaced by an approximate accumulator ,which achieves up to 70% power reduction for the kernel computations in SVM for hyperspectral image classification problem [14]. The authors of [15] designed an approximate adder and fixed-width multiplier with a low-cost compensation. Adopting the devised adder and multiplier in SVM classifier leads to reduce the power-delay product (PDP), area and critical path delay by 32.4%, 18.7% and 16%, respectively.…”

Section: Introductionmentioning

confidence: 99%

Algorithmic-Level Approximate Tensorial SVM Using High-Level Synthesis on FPGA

et al. 2021

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Approximate Computing Techniques (ACT) are promising solutions towards the achievement of reduced energy, time latency and hardware size for embedded implementations of machine learning algorithms. In this paper, we present the first FPGA implementation of an approximate tensorial Support Vector Machine (SVM) classifier with algorithmic level ACTs using High-Level Synthesis (HLS). A touch modality classification framework was adopted to validate the effectiveness of the proposed implementation. When compared to exact implementation presented in the state-of-the-art, the proposed implementation achieves a reduction in power consumption by up to 49% with a speedup of 3.2×. Moreover, the hardware resources are reduced by 40% while consuming 82% less energy in classifying an input touch with an accuracy loss less than 5%.

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Energy efficient SVM classifier using approximate computing

Cited by 7 publications

References 14 publications

Efficient Algorithms for Embedded Tactile Data Processing

Efficient Algorithms for Embedded Tactile Data Processing

Advancing synthesis of decision tree-based multiple classifier systems: an approximate computing case study

Algorithmic-Level Approximate Tensorial SVM Using High-Level Synthesis on FPGA

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