2009
DOI: 10.1016/j.apsusc.2008.12.084
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Effects of cap layer on ohmic Ti/Al contacts to Si+ implanted GaN

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Cited by 31 publications
(16 citation statements)
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“…The source and drain contacts were annealed at 700°C for 90 s in Ar ambient. The contact resistance of the source and drain electrodes was determined 15 to be lower than 10 −5 ⍀ cm 2 . MOSFET characterization was performed with a set of Keithley units.…”
Section: Methodsmentioning
confidence: 99%
See 1 more Smart Citation
“…The source and drain contacts were annealed at 700°C for 90 s in Ar ambient. The contact resistance of the source and drain electrodes was determined 15 to be lower than 10 −5 ⍀ cm 2 . MOSFET characterization was performed with a set of Keithley units.…”
Section: Methodsmentioning
confidence: 99%
“…Although a protective SiO 2 cap layer has been used, a significantly pit density has been observed. 15 The rms surface roughness of the GaN surface before the gate oxide deposition, measured using an atomic force microscope, was 130 Å. AЈ is determined to be 1570 cm 4−␣3 V ␣3−1 / s K from this value. Therefore, it is clear that for our fabricated MOSFET, interface trap charge along with surface roughness plays a major role.…”
Section: ͑11͒mentioning
confidence: 96%
“…GaN JBS diodes could further increase the performance of GaN-based power rectifiers in the 600 V-3.3 kV range. In this sense, we are working on the optimization of contact resistance to implanted p-type GaN [27]. We have found that protection during post-implantation annealing is very important to obtain a good uniformity on the contact properties.…”
Section: Gan Power Devicesmentioning
confidence: 99%
“…Moreover, it also has to be easily removed to be compatible with device processing. Many cap‐layers have been reported in the literature such as AlN, oxides and other nitrides . However, very few articles present GaN surface characterizations (AFM or SEM) after annealing and etching of the cap‐layer.…”
Section: Introductionmentioning
confidence: 99%