Dynamically Reconfigurable Data Readout of Pixel Detectors for Automatic Synchronization with Data Acquisition Systems

Abstract

Reconfigurable detectors with dynamically selectable sensing and readout modes are highly desirable for implementing edge computing as well as enabling advanced imaging techniques such as foveation. The concept of a camera system capable of simultaneous passive imaging and dynamic ranging in different regions of the detector is presented. Such an adaptive-autonomous detector with both spatial and temporal control requires programmable window of exposure (time frames), ability to switch between readout modes such as full-frame imaging and zero-suppressed data, modification of the number of pixel data bits and independent programmability for distinct detector regions. In this work, a method is presented for seamlessly changing time frames and readout modes without data corruption while still ensuring that the data acquisition system (DAQ) does not need to stop and resynchronize at each change of setting, thus avoiding significant dead time. Data throughput is maximized by using a minimum unique data format, rather than lengthy frame headers, to differentiate between consecutive frames. A data control and transmitter (DCT) synchronizes data transfer from the pixel to the periphery, reconfigures the data to transmit it serially off-chip, while providing optimized decision support based on a DAQ definable mode. Measurements on a test structure demonstrate that the DCT can operate at 1 GHz in a 65 nm LP CMOS process.

In-pixel AI for lossy data compression at source for X-ray detectors

“…Moreover, although simulated data could contain ∼ 97% zeros, the noisy experimental data is closer to ∼ 60% zeros, indicating a much higher occupancy. A breakeven analysis of full-frame imaging vs. zero-suppressed readout for large pixel Read-Out Integrated Circuits (ROICs) shows that zero suppression is no longer useful for occupancies ≥ 40% [3].…”

An 8.72 µW Low-Noise and Wide Bandwidth FEE Design for High-Throughput Pixel-Strip (PS) Sensors

“…It amplifies the output signal of the photon sensor. A data acquisition (DAQ) based Field Programmable Gate Array (FPGA)-based board then extracts all necessary data about the photons from the output signals of the readout electronics and utilizes that information to figure out a coincidence pair of photons to create a line of response (LOR) [ 1 , 2 , 3 , 4 ]. For instance, the Compact Muon Solenoid (CMS) illustrated in Figure 1 a [ 5 ], is predicted to receive a substantial upgrade of the outer tracker sensor and its front-end readout electronics, needing higher granularity and readout bandwidth to absorb a big amount of pileup events in the High-Luminosity Large Hadron Collider (LHC) [ 2 , 5 ].…”