2015
DOI: 10.1007/978-3-319-23404-5_9
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DSVerifier: A Bounded Model Checking Tool for Digital Systems

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Cited by 21 publications
(53 citation statements)
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“…In order to tackle such problem, this paper proposes a verification methodology based on bounded model checking (BMC) techniques [11], which verifies properties on statespace digital controllers, by means of a verification tool named as Digital-Systems Verifier (DSVerifier). It is worth noting that this paper extends a previous work [7,18,2,13,6]. In particular, the major improvement of the DSVerifier version described here relies on the support for state-space models, which allows a better insight about the internal system behavior, enables the verification of new properties (e.g., controllability and observability), and considers initial conditions for system analysis [14].…”
Section: Motivationmentioning
confidence: 90%
See 1 more Smart Citation
“…In order to tackle such problem, this paper proposes a verification methodology based on bounded model checking (BMC) techniques [11], which verifies properties on statespace digital controllers, by means of a verification tool named as Digital-Systems Verifier (DSVerifier). It is worth noting that this paper extends a previous work [7,18,2,13,6]. In particular, the major improvement of the DSVerifier version described here relies on the support for state-space models, which allows a better insight about the internal system behavior, enables the verification of new properties (e.g., controllability and observability), and considers initial conditions for system analysis [14].…”
Section: Motivationmentioning
confidence: 90%
“…In contrast, Alur et al [3,4] proposed the prior automated verification approaches, regarding model checking, which inspired the development of other verifiers for cyber-physical systems and hybrid automata (e.g., Maellan [32], Open-Kronos [33], and UPPAAL [5]). Nonetheless, differently from the work presented here, such approaches do not tackle system robustness related to implementation aspects [7,18,2].…”
Section: Background and Related Workmentioning
confidence: 95%
“…Indeed, digital filters and controllers [31,43,44] were tackled, in order to specify system-level properties of those systems, using linear-time temporal logic [45]. In particular, a specific UAV application was tackled, with the goal to verify its attitude controllers [46].…”
Section: Current Achievements and Future Trendsmentioning
confidence: 99%
“…Recently, a verification tool for digital systems was proposed, which is called digital system verifier (DSVerifier) [31] and is able to aid engineers to check overflow, limit cycle, output error, timing, stability, and minimum phase, considering finite word-length (FWL) effects. Additionally, DSVerifier checks closed-loop systems with uncertain models considering FWL effects, which are typically represented as hybrid systems, i.e., the controller is digital but the controlled agent (plant) is a physical and continuous system.…”
Section: Incorporating System Models To Automated Verification Procedmentioning
confidence: 99%
“…Although control theory developed techniques to validate system models experimentally and in turn the theoretical effectiveness of their controllers, implementation may differ from its design. Software engineering is playing a role in both producing correct-by-construction implementations from the mathematical description of controllers [Kowshik et al 2002;Darulova and Kuncak 2014;Cai 2002] and in the definition of specialized testing and verification procedures [Darulova and Kuncak 2013;Ismail et al 2015;Matinnejad et al 2016;Zuliani et al 2010;Villegas et al 2011;Camara et al 2013]. Implementation of distributed control.…”
Section: Software Engineering For Control Theorymentioning
confidence: 99%