2010 10th Annual International Conference on New Technologies of Distributed Systems (NOTERE) 2010
DOI: 10.1109/notere.2010.5536671
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Designing dynamic reconfiguration for distributed real time embedded systems

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Cited by 5 publications
(2 citation statements)
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“…On the other hand, the hardware-software co-design problem is more complex in system development because the components need to be more advanced. The possibility of manipulating FPGA configurations at runtime using on-chip resources is investigated in [8,9]. The requirements for runtime partial reconfiguration capability in embedded applications can be sustained by storing multiple bitstream generation choices, including direct bitstream manipulation for logic blocks and hybrid one-dimensional and two-dimensional physical area relocation control modules.…”
Section: Scientific Background Of the Researchmentioning
confidence: 99%
“…On the other hand, the hardware-software co-design problem is more complex in system development because the components need to be more advanced. The possibility of manipulating FPGA configurations at runtime using on-chip resources is investigated in [8,9]. The requirements for runtime partial reconfiguration capability in embedded applications can be sustained by storing multiple bitstream generation choices, including direct bitstream manipulation for logic blocks and hybrid one-dimensional and two-dimensional physical area relocation control modules.…”
Section: Scientific Background Of the Researchmentioning
confidence: 99%
“…A model based approach is provided in (Krichen et al, 2010) to deal with software reconfiguration in distributed real-time embedded (DRE) systems with respect to non-functional properties. Authors started from the fact that MARTE and AADL standards present the limitation of permitting dynamic reconfiguration modeling for RTES by using only static sets of predefined modes (also called configurations) Online time verif.…”
Section: Software-level Adaptation Modelingmentioning
confidence: 99%