Design of subthreshold adiabatic logic based combinational and sequential circuits

Kalyani, P.; Kumar, Prashant; Sekhar, P. Chandra

doi:10.1109/etiict.2017.7977002

Search citation statements

Order By: Relevance

Paper Sections

Select...

Adiabatic Logic1

Citation Types

Supporting

Mentioning

Contrasting

Year Published

2018

2023

Publication Types

Select...

Book2

Other2

Article1

Relationship

Self Cite0

Independent5

Authors

Journals

Cited by 6 publications

(1 citation statement)

References 8 publications

Supporting

Mentioning

Contrasting

Order By: Relevance

“…In CMOS, logic equal amount of energy dissipates during charging and discharging process which is given by [8,9] Fig. 1 Conventional CMOS inverter…”

Section: Adiabatic Logicmentioning

confidence: 99%

Improved Noise Margin and Reduced Power Consumption in Subthreshold Adiabatic Logic Using Dual Rail Power Supply

Prajapati

Shukla

Gupta

2020

Lecture Notes in Electrical Engineering

View full text Add to dashboard Cite

Adiabatic logic has been found to be effective in achieving low power in VLSI circuits. In subthreshold region, the circuit conducts a small current and consumes lesser power. In this paper, the dual rail power supply with 0 and 180°phase difference has been used for subthreshold adiabatic logic (SAL). A priority encoder is designed using SAL with dual rail power supply. All the circuit simulations are done using HSPICE simulator at 22 nm PTM technology. In-phase dual supply offers low power consumption, whereas out-phase dual power supply offers an improved noise margin.

show abstract

“…In CMOS, logic equal amount of energy dissipates during charging and discharging process which is given by [8,9] Fig. 1 Conventional CMOS inverter…”

Section: Adiabatic Logicmentioning

confidence: 99%