Design of 1mWCMOS OOK super-regenerative receiver for 402&amp;#x2013;405MHz medical applications

Alsaegh, Samar; Mohamed, Sherif Ahmed Saleh; Manoli, Yiannos

doi:10.1109/iscas.2014.6865406

Cited by 1 publication

(2 citation statements)

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“…Thus, a signal shaping procedure is required to bring back the data into its original non‐return‐to‐zero (NRZ) format. Examples are pulse width expander 8 and sample and hold (S&H) circuit 9 …”

Section: Introductionmentioning

confidence: 99%

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A fully digital open‐loop clock and data synchronizer for ultra‐low power super‐regenerative receivers

Abbaszadeh

Jalali

2022

Circuit Theory & Apps

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In this paper, a clock and data synchronizer (CDS) is presented to improve channel selectivity of digitally assisted super-regenerative receivers (SRRs).The proposed CDS performs phase and frequency adjustment of the quench signal using a fully digital open-loop architecture removing the need for conventional phase-locked loop (PLL) architectures. The required signal shaping of the recovered data is also performed by the proposed CDS to restore the nonreturn-to-zero data format without using any pulse width expander or sample and hold circuit. A multichannel SRR is implemented employing the proposed CDS where a Q-enhancement procedure is also adopted to further improve the channel selectivity. The proposed SRR operates at 2.4-GHz ISM band and supports a data rate of 1 Mb/s, while the sensitivity is about À88 dBm, and the selectivity is better than À18 dB at a 10-MHz offset frequency. Implemented using a 0.18-μm standard CMOS process and with a 1.1-V supply voltage, the proposed SRR consumes about 0.4 mW.

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Section: Introductionmentioning

confidence: 99%

“…Examples are pulse width expander 8 and sample and hold (S&H) circuit. 9 The shape of the quench signal is another design parameter that affects the selectivity of the SRRs. 10,11 Quench signals with triangular, sawtooth, and sinusoidal waveforms as well as various piecewise linear methods are adopted in the prior art.…”

mentioning

confidence: 99%

A fully digital open‐loop clock and data synchronizer for ultra‐low power super‐regenerative receivers

Abbaszadeh

Jalali

2022

Circuit Theory & Apps

View full text Add to dashboard Cite

show abstract

Design of 1mWCMOS OOK super-regenerative receiver for 402–405MHz medical applications

Cited by 1 publication

References 5 publications

A fully digital open‐loop clock and data synchronizer for ultra‐low power super‐regenerative receivers

A fully digital open‐loop clock and data synchronizer for ultra‐low power super‐regenerative receivers

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