Design and implementation of secured agent based NoC using shortest path routing algorithm

Abstract

Network on chip (NoC) is a scalable interconnection architecture for every increasing communication demand between many processing cores in system on chip design. Reliability aspects are becoming an important issue in fault tolerant architecture. Hence there is a demand for fault tolerant Agent architecture with suitable routing algorithm which plays a vital role in order to enhance the NoC performance. The proposed fault tolerant Agent based NoC method is used to enhance the reliability and performance of the Multiprocessor System on Chip (MPSoC) design against faulty links and nodes. These agents are placed in hierarchical manner to collect, process, classify and distribute different fault information related to the faulty links and nodes of the network. This fault information is used for further packet routing in the network with the help of shortest path routing algorithm. In addition to this the agent will provide the security for the node by setting firewall, which then decides whether the packet has to be processed or not. This intern provides high performance, low latency NoC by avoiding deadlock and live lock with low area overhead.

Thermal-aware directional and adaptive routing algorithm for 3D network-on-chip

“…Hence, the possibility of the thermal hotspots increases especially in layers subsequently away from the sink [6]. Thermal hotspots exacerbate the failure mechanism in 3D NoC [7], putting an additional burden on chip cooling costs and system reliability. To eliminate thermal hotspots while retaining performance, designers must understand the influence of temperature changes on the systems [8].…”