Dead-Time Analysis of a Universal SiC-GaN-Based DC-DC Converter for Plug-In Electric Vehicles

Moradpour, Milad; Serpi, Alessandro; Gatto, Gianluca

doi:10.1109/iecon.2018.8591746

Cited by 6 publications

(3 citation statements)

References 28 publications

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“…The on-dead time t dt,on and the off-dead time t dt,off can be chosen in different ways based on the application request [30]. If t dt,on is equal to t dt,off the dead time is simply defined as t dt .…”

Section: Dead Time Effect On the Motor Drives Invertersmentioning

confidence: 99%

Low-Voltage GaN FETs in Motor Control Application; Issues and Advantages: A Review

et al. 2021

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The efficiency and power density improvement of power switching converters play a crucial role in energy conversion. In the field of motor control, this requires an increase in the converter switching frequency together with a reduction in the switching legs’ dead time. This target turns out to be complex when using pure silicon switch technologies. Gallium Nitride (GaN) devices have appeared in the switching device arena in recent years and feature much more favorable static and dynamic characteristics compared to pure silicon devices. In the field of motion control, there is a growing use of GaN devices, especially in low voltage applications. This paper provides guidelines for designers on the optimal use of GaN FETs in motor control applications, identifying the advantages and discussing the main issues. In this work, primarily an experimental evaluation of GaN FETs in a low voltage electrical drive is carried out. The experimental investigation is obtained through two different experimental boards to highlight the switching legs’ behavior in several operative conditions and different implementations. In this evaluative approach, the main GaN FETs’ technological aspects and issues are recalled and consequently linked to motion control requirements. The device’s fast switching transients combined with reduced direct resistance contribute to decreased power losses. Thus, in GaN FETs, a high switching frequency with a strong decrease in dead time is achievable. The reduced dead time impact on power loss management and improvement of output waveforms quality is analyzed and discussed in this paper. Furthermore, input filter capacitor design matters correlated with increasing switching frequency are pointed out. Finally, the voltage transients slope effect (dv/dt) is considered and correlated with low voltage motor drives requirements.

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Section: Dead Time Effect On the Motor Drives Invertersmentioning

confidence: 99%

Low-Voltage GaN FETs in Motor Control Application; Issues and Advantages: A Review

et al. 2021

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“…Ideally, the output dead-time should be equal to zero to minimize the additional losses [11]. When a fixed dead-time is used, it should be long enough with respect to the driver and transistor switching parameters to prevent a shoot-through (i.e., when both transistors are on simultaneously) [18]. The dead-time in the half-bridge configuration is adjusted by delaying the MCU's control signal's rising and falling edges.…”

Section: Dead-time Generationmentioning

confidence: 99%

Reverse Conduction Loss Minimization in GaN‑Based PMSM Drive

et al. 2020

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Gallium nitride (GaN) devices are becoming more popular in power semiconductor converters. Due to the absence of the freewheeling substrate diode, the reverse conduction region is used in GaN transistors to conduct the freewheeling current. However, the voltage drop across the device in the reverse conduction mode is relatively high, causing additional power losses. These losses can be optimized by adequately adjusting the dead-time issued by the microcontroller. The dead-time loss minimization strategies presented in the literature have the common disadvantage that either additional hardware or specific converter data are needed for their proper operation. Therefore, this paper’s motivation is to present a novel dead-time loss minimization method for GaN-based high-frequency switching converters for electric drives that does not impose additional requirements on the hardware design phase and converter data acquisition. The method is based on optimizing the current controllers’ output with a simple perturb-and-observe tracker. The experimental results show that the proposed approach can minimize the dead-time losses over the whole drive’s operating range at the cost of only a moderate increase in software complexity.

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“…For multiphase interleaved converter, because of the limitation of the inevitability of the deviation, parameters of each phase are incongruity; the current of each phase is not always balanced, which causes higher switching, conduction losses, early saturation of the inductor, and even operation malfunction. 22,23 In order to realize current sharing, a lot of control techniques based on current sensors are introduced, such as DC droop control, 24 circular chain control, 25 master-slave control, 26 sliding mode control, 27 and phase-shift method. 28 However, as the number of phases increases,…”

Section: Introductionmentioning

confidence: 99%

Interleaved high conversion ratio DC–DC converter with output self‐balancing and current auto‐sharing for DC nanogrid application

Chen

Feng

Chen

et al. 2022

Circuit Theory & Apps

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In the application of bipolar DC bus configuration in the DC nanogrid, the unbalanced voltage of two outputs in bipolar DC bus, due to the unbalanced conditions of loads and/or energy sources, will cause deterioration of the power quality of the bus and may damage the switch, affecting the stability and safety of the system. In order to solve the problem of unbalanced voltage of two outputs, interleaved series capacitor based dual‐output converter with a high conversion ratio is presented in this paper. By applying negative current mode (NCM) to the main inductor, the character of two‐output self‐balancing and zero voltage switching (ZVS) of all switches for such this topology configuration is achieved. In the NCM mode, the parallel diodes of main switches are not conducted during dead time and guarantee the flowing path to load side. Thus, based on this condition, volt‐second balance of main inductor is obtained to get the character of two‐output self‐balancing. Furthermore, by adopting series capacitor in the proposed topology and based on the charge‐balance of the intermediate block capacitor, inductor current existed in the two phase could be auto‐sharing. Comprehensive operational principle analysis, loss analysis, and efficiency of the proposed converter under different load conditions have been given, and the comparison analysis of three operation modes and selection of negative current mode is clarified. Small signal model of the proposed converter is described to convenient for the controller design. Finally, simulation results and a 20–220 V prototype are built to verify the character analysis of the proposed converter.

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Dead-Time Analysis of a Universal SiC-GaN-Based DC-DC Converter for Plug-In Electric Vehicles

Cited by 6 publications

References 28 publications

Low-Voltage GaN FETs in Motor Control Application; Issues and Advantages: A Review

Low-Voltage GaN FETs in Motor Control Application; Issues and Advantages: A Review

Reverse Conduction Loss Minimization in GaN‑Based PMSM Drive

Interleaved high conversion ratio DC–DC converter with output self‐balancing and current auto‐sharing for DC nanogrid application

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