Cross-sectional TEM and KOH-Etch Studies of Extended Defects in 3C-SiC p + n Junction Diodes Grown on 4H-SiC Mesas

Speer, Kevin M.; Neudeck, Philip G.; Spry, David J.; Trunek, Andrew J.; Pirouz, Pirouz

doi:10.1007/s11664-007-0297-z

Cited by 11 publications

(5 citation statements)

References 21 publications

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“…b. The line pits on the sub‐side indicate the presence of SFs , and their density is apparently higher in the strained region, as shown in Fig. c (∼1.1 × 10 5 cm −1 ) than in the region without strain (∼5.3 × 10 4 cm −1 ).…”

Section: Resultsmentioning

confidence: 72%

Excess carrier lifetime and strain distributions in a 3C-SiC wafer grown on an undulant Si substrate

Kato

Yoshida

Ichimura

et al. 2013

Phys. Status Solidi A

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In this study, we have used the microwave photoconductivity decay method to map excess carrier lifetimes in a n‐type 3C‐SiC wafer grown on an undulant Si substrate. We compared these lifetime maps with the distributions of strains and defects, which were observed using optical microscopy, Raman spectroscopy and pit distributions after molten NaOH etching. We found that excess carrier lifetimes in strained regions, which exhibit high densities of defects, are short. We also found that carrier lifetimes in strained regions at the cross sections of the 3C‐SiC wafer are short. These results suggest that defects and strains in the wafer exhibit distributions similar to those of shortened carrier lifetimes. Excess carrier lifetime map for a 3C‐SiC wafer.

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Section: Resultsmentioning

confidence: 72%

Excess carrier lifetime and strain distributions in a 3C-SiC wafer grown on an undulant Si substrate

Kato

Yoshida

Ichimura

et al. 2013

Phys. Status Solidi A

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“…The 3C-SiC has the lowest SFs formation energy, which varies from −1.71 to −6.27 mJ/m 2 compared to 3.1 to 40.1 mJ/m 2 in 6H-SiC and 17.7 to 18.7 mJ/m 2 in 4H-SiC . It has been demonstrated that the density of SFs can be reduced in 3C-SiC grown on patterned Si substrates. , Small SF-free 3C-SiC areas can be grown on a step-free 4H-SiC mesas . However, to our knowledge there are no data on large-area SF-free 3C-SiC layers.…”

Section: Results and Discussionmentioning

confidence: 95%

“…20,21 Small SF-free 3C-SiC areas can be grown on a step-free 4H-SiC mesas. 22 However, to our knowledge there are no data on large-area SF-free 3C-SiC layers.…”

Section: Resultsmentioning

confidence: 95%

Single Domain 3C-SiC Growth on Off-Oriented 4H-SiC Substrates

Jokubavičius

Yazdi

Liljedahl

et al. 2015

Crystal Growth & Design

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We investigated the formation of structural defects in thick (~ 1mm) 3C-SiC layers grown on off-oriented 4H-SiC substrates via lateral enlargement mechanism using different growth conditions. A two-step growth process based on this technique was developed, which provides a trade-off between the growth rate and the number of defects in the 3C-SiC layers. Moreover, we demonstrated that the twostep growth process combined with geometrically controlled lateral enlargement mechanism allows formation of single 3C-SiC domain which enlarges and completely covers the substrate surface. High crystalline quality of the grown 3C-SiC layers is confirmed using high resolution x-ray diffraction and low temperature photoluminescence measurements. ABSTRACTWe investigated the formation of structural defects in thick (~ 1mm) 3C-SiC layers grown on off-oriented 4H-SiC substrates via lateral enlargement mechanism using different growth conditions. A two-step growth process based on this technique was developed, which provides a trade-off between the growth rate and the number of defects in the 3C-SiC layers. Moreover, we 3 demonstrated that the two-step growth process combined with geometrically controlled lateral enlargement mechanism allows formation of single 3C-SiC domain which enlarges and completely covers the substrate surface. High crystalline quality of the grown 3C-SiC layers is confirmed using high resolution x-ray diffraction and low temperature photoluminescence measurements.

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“…Additionally, the intrinsic carrier concentration (n i ) is directly proportional to N C and N V , which are the conduction and valence band DoS respectively, as expressed in (11). The n i is the result of the thermal expansion of the lattice and electron-phonon coupling.…”

Section: Density Of States (Dos) In the Conduction And Valence Bandsmentioning

confidence: 99%

“…Further, the lower bandgap of β-SiC leads to achieving channel inversion at reduced electric field levels in the case of metal oxide semiconductor field effect transistors (MOSFETs) [10]. Finally, it has been demonstrated that the stacking faults in the 3C-SiC material do not affect its operation [11], as evidenced in the case of 4H-SiC, due to propagation phenomena [12]. In addition, the cubic structure imparts higher electrical propertied isotropy [6].…”

Section: Introductionmentioning

confidence: 99%

Validated physical models and parameters of bulk 3C–SiC aiming for credible technology computer aided design (TCAD) simulation

Arvanitopoulos¹,

Lophitis²,

Gyftakis³

et al. 2017

Semicond. Sci. Technol.

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The cubic form of SiC (βor 3C-) compared to the hexagonal α-SiC polytypes, primarily 4H-and 6H-SiC, has lower growth cost and can be grown heteroepitaxially in large area Silicon (Si) wafers which makes it of special interest. This in conjunction with the recently reported growth of improved quality 3C-SiC, make the development of devices an imminent objective. However, the readiness of models that accurately predict the material characteristics, properties and performance is an imperative requirement for attaining the design and optimization of functional devices. The purpose of this study is to provide and validate a comprehensive set of models alongside with their parameters for bulk 3C-SiC. The validation process revealed that the proposed models are in a very good agreement to experimental data and confidence ranges were identified. This is the first piece of work achieving that for 3C-SiC. Considerably, it constitutes the necessary step for Finite Element Method (FEM) simulations and Technology Computer Aided Design (TCAD).

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Cross-sectional TEM and KOH-Etch Studies of Extended Defects in 3C-SiC p + n Junction Diodes Grown on 4H-SiC Mesas

Cited by 11 publications

References 21 publications

Excess carrier lifetime and strain distributions in a 3C-SiC wafer grown on an undulant Si substrate

Excess carrier lifetime and strain distributions in a 3C-SiC wafer grown on an undulant Si substrate

Single Domain 3C-SiC Growth on Off-Oriented 4H-SiC Substrates

Validated physical models and parameters of bulk 3C–SiC aiming for credible technology computer aided design (TCAD) simulation

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