Comparative study between HDLs simulation and Matlab for image processing

Khoukhi, Hasnae El; Sabri, My Abdelouahed

doi:10.1109/isacv.2018.8354046

Cited by 14 publications

(12 citation statements)

References 9 publications

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“…Dedicated hardware can do the image processing faster and allows for further optimization of the design. 42,43 The hardware once implemented can be optimized using suitable techniques for area, power, and efficiency. Researchers have exploited digital signal processors, 44 FPGA, 45 and ASIC 46 for this purpose.…”

Section: Hardware Implementation Of Image Processing Algorithmsmentioning

confidence: 99%

A study on VLSI implementation of image enhancement techniques

Aklak

Pugazhenthi²,

Alex

2021

Concurrency and Computation

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In real-time, the images captured are not always appreciable for visual perception.The quality of the image relies on the illumination condition. Contrast enhancement is required to improve the visual quality of the image. In this article, the image enhancement techniques that are adaptable for real-time images are studied. Further, an investigation is done on implementing the image processing algorithms in very large-scale integration (VLSI) hardware. As the image data are comparatively larger, the computational complexity and the memory requirement are more. From the study, the need for efficient computation of such image processing algorithms is realized. The efficient computation of image processing algorithms on hardware platforms, in particular on field programmable gate array (FPGA), is reviewed. As an experiment, the gamma-transformation technique used for image enhancement is realized. Initially, the prototype is modeled using MATLAB, and then it is implemented using an FPGA. K E Y W O R D Sfield programmable gate array, floating point multiplier, image enhancement INTRODUCTIONIn the modern digital world, all multimedia transactions require good-quality images. The visibility of an image depends on the illuminance and reflectance of the scene in the real world. The brightness of a point in an image is non-linear to the brightness of the same point in the real world.Generally, lighting condition determines the quality of an image. The images taken under poor lighting conditions may cause discomfort while viewing images.The image acquired can be degraded due to various reasons such as sensor level malfunction, low visibility, excessive exposure, foggy conditions, and so on. 1 To overcome the degradation, pre-processing is required to enhance the image. Image enhancement is the process of adjusting digital images so that the results are more suitable for display or further processing. It includes processes like deblurring, noise removal, filtering, and so on.Not all images will require the same image enhancement technique because there may be over-exposed regions in outdoor images that will need different treatment compared to indoor images. In literature, there are many algorithms proposed for image enhancement. The technique of being applied for enhancement depends on the input quality of the image. The quality needs to be assessed before applying any approach for a better perception of the image. A real-time implementation of image enhancement is hard to design using software because a large data set is required to represent an image. Since field programmable gate arrays (FPGAs) could exploit the spatial parallelism in image enhancement algorithms they are widely used for hardware implementation.Realizing the design on FPGAs, offer a compromise between the flexibility of general-purpose processors and the hardware-based speed of an integrated-circuit design. 2 Also, the programmable property of FPGA makes them a good choice for image processing applications, as the processing of the number of images also...

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Section: Hardware Implementation Of Image Processing Algorithmsmentioning

confidence: 99%

A study on VLSI implementation of image enhancement techniques

Aklak

Pugazhenthi²,

Alex

2021

Concurrency and Computation

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“…(5) Where, Pij is the occurrence probability of the gray level pair {i, j} and N is the total number of pixels in the image • Homogeneity: it takes high values if the differences between the pairs of pixels analyzed are small and it is more sensitive to the diagonal elements of the GLCM, unlike the contrast which depends more on the distant elements of the diagonal [40]. It is measured via the formula (6): (6)…”

Section: Techniques Of Texture Features  Gray Level Co-occurrencementioning

confidence: 99%

“…FPGAs have Programmable Logic Blocks which provide a high level of flexibility and have a configurable architecture in the form Lookup Tables which allows them to be programmed to perform a wider variety of tasks. The principal inhibitor is the necessity of uses specialist programming tools, describing algorithms in Hardware Description Language (HDL) [5] [6]. Verilog represents a formerly proprietary HDL used for the synthesis of hardware designs and is supported in a wide variety of software tools.…”

Section: Introductionmentioning

confidence: 99%

Withdrawn

2020

IJEAT

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Today, skin cancer is a serious health problem and the quest for a correct clinical diagnosis has been an ongoing concern for dermatologists and for many researchers an important field study. Field Programmable Gate Array (FPGA) technology has become a key part of the current movement towards innovation. It provides a viable target for applying image processing algorithms. It presents a viable target for the implementation of algorithms suited to image processing even under real-time requirements, because of their flexibility and great potential. FPGAs have shown very high performance in spite of their low operational frequency and high parallelism in applications. In this paper, an embedded Content-Based Image Retrieval (CBIR) implementation based on FPGA is proposed to manage the image data efficiently and fastly. We describe the implementation of CBIR in image processing applications using FPGA. The main aim behind this implementation is to reach minimum timing by the maximum utilization of resources. We are conducting a study on the advantages of this embedded approach and discussed its effectiveness for a set of benchmark images publically available dataset PH2. The FPGA-based implementation shows the feasibility of the proposed methodology. The functional implementation of all processes using the Verilog code of FPGA has been compiled on the ALTERA QUARTUS-II software tool.

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“…However, several efforts have been made to implement it on hardware, where more optimized and parallel algorithms are possible. The use of the field programmable gate array (FPGA) technology presents an appropriate alternative [3]. Recently, the size and features of FPGAs have been known to have great improvements.…”

Section: Introductionmentioning

confidence: 99%

“…Recently, the size and features of FPGAs have been known to have great improvements. This has increased the interest in using it as an implementation platform for image processing applications, especially those that require real-time processing [3]. In addition to that, an image that suffers from contrast is usually caused by a haze.…”

Section: Introductionmentioning

confidence: 99%

Digital image enhancement by brightness and contrast manipulation using Verilog hardware description language

Azhari

Setumin

Noorsal

2023

IJECE

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A foggy environment may cause digitally captured images to appear blurry, dim, or low in contrast. This will impact computer vision systems that rely on image information. With the need for real-time image information, such as a plate number recognition system, a simple yet effective image enhancement algorithm using a hardware implementation is very much needed to fulfil the need. To improve images that suffer from low exposure and hazy, the hardware implementations are usually based on complex algorithms. Hence, the aim of this paper is to propose a less complex enhancement algorithm for hardware implementation that is able to improve the quality of such images. The proposed method simply combines brightness and contrast manipulation to enhance the image. In order to see the performance of the proposed method, a total of 100 vehicle registration number images were collected, enhanced, and evaluated. The evaluation results were compared to two other enhancement methods quantitatively and qualitatively. Quantitative evaluation is done by evaluating the output image using peak signal-to-noise ratio and mean-square error evaluation metrics, while a survey is done to evaluate the output image qualitatively. Based on the quantitative evaluation results, our proposed method outperforms the other two enhancement methods.

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Comparative study between HDLs simulation and Matlab for image processing

Cited by 14 publications

References 9 publications

A study on VLSI implementation of image enhancement techniques

A study on VLSI implementation of image enhancement techniques

Withdrawn

Digital image enhancement by brightness and contrast manipulation using Verilog hardware description language

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