Comparative Evaluation of Spin-Transfer-Torque and Magnetoelectric Random Access Memory

Wang, Shaodi; Lee, Hochul; Ebrahimi, Farbod; Amiri, Pedram Khalili; Wang, Kang L.; Gupta, Puneet

doi:10.1109/jetcas.2016.2547681

Cited by 86 publications

(23 citation statements)

References 64 publications

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“…Moreover, the required driving current decreases for the write operation allowing a reduction of the access transistor size [26]. VCMA-MTJ-based memory performs better than STT-MRAM with respect to switching energy and density [20,26,37,38].…”

Section: Memorymentioning

confidence: 99%

Magnetic Tunnel Junction Applications

Maciel

Marques

Naviner

et al. 2019

Sensors

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Spin-based devices can reduce energy leakage and thus increase energy efficiency. They have been seen as an approach to overcoming the constraints of CMOS downscaling, specifically, the Magnetic Tunnel Junction (MTJ) which has been the focus of much research in recent years. Its nonvolatility, scalability and low power consumption are highly attractive when applied in several components. This paper aims at providing a survey of a selection of MTJ applications such as memory and analog to digital converter, among others.

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Section: Memorymentioning

confidence: 99%

Magnetic Tunnel Junction Applications

Maciel

Marques

Naviner

et al. 2019

Sensors

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“…A S transistor feature size continues to shrink, the impact of process variations on circuit behavior, such as delay or gain, grows and cannot be neglected [1], [2], [3], [4], [5]. Under these variations, circuit behavior is no longer a deterministic value and must be characterized by a random variable rather than a nominal value.…”

Section: Introductionmentioning

confidence: 99%

Accurate Multi-segment Probability Density Estimation Through Moment Matching

Krishnan

Wu²,

Bodapati³

et al. 2024

IEEE Trans. Comput.-Aided Des. Integr. Circuits Syst.

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In this manuscript, we present two novel algorithms for statistical circuit performance modeling.The first algorithm is a maximum entropy moment matching method (MAX-ENT) to model the overall distribution of the circuit performance considering process variations. A prior paper about this work was submitted by the same authors for publication in the ISQED-2013 proceedings, and cited in this manuscript with reference number [26]. This MAXENT algorithm is presented in Section III with more detailed derivation.In addition, we utilize the MAXENT approach, but apply it to a piecewise distribution model (PDM) framework, leading to a novel extension of the generic framework to model rare event failures in circuit modeling. We demonstrate why the prior work is not applicable to rare event circuit modeling and also provide a novel solution that showcases how the prior work can be abstracted for application to rare event circuit modeling. Furthermore, we provide several new experiments that demonstrate the advantage of using the current submissions framework over the prior papers framework. The PDM algorithm and experiment results are presented in Section IV and Section V respectively.Below is a brief summary of what is new to the manuscript and what was already proposed in the prior paper.Section I: Summary of basic statistical modeling algorithms and a brief overview of their strengths and weaknesses, including [26] Section II: A brief background on statistical modeling for circuits Section III: Detailed summary of the work proposed in [26], including derivations and experiment results (3 pages) Section IV: Completely new material (5 pages) that shows a new circuit modeling technique that extends the work in [26] by proposing new algorithms and models Section V: Completely new material (3 pages) that demonstrates the advantages of the current submissions algorithm over other algorithms including [26] The common denominator between [26] and the current submission is the fact that they utilize the same moment matching technique to obtain the probability distribution. However, although the underlying engine is the same, we estimate that at least 50% of the material is completely new because of the significant amount of new algorithms, models, and experimental results. 1 0278-0070 (c)Abstract-The impact of process variations continues to grow as transistor feature size shrinks. Such variations in transistor parameters lead to variations and unpredictability in circuit output and may ultimately cause them to violate specifications leading to circuit failure. In fact, timely failures in critical circuits may lead to catastrophic failures in the entire chip. As such, statistical modeling of circuit behavior is becoming increasingly important. However, existing statistical circuit simulation approaches fail to accurately and efficiently analyze the high sigma behavior of probabilistic circuit output. To this end, we propose PDM (Piecewise Distribution Model) -a piecewise distribution modeling approach via moment matching using ma...

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“…STT-MRAM is designed with STT magnetic tunnel junctions (STT-MTJ) [1,2], providing high endurance, fast programming and accessing time, and being identified as a possible replacement of current memory technologies, such as static RAM (SRAM) cache [3,4] and Dynamic RAM (DRAM) memory [5]. MeRAM designed with voltage-control MTJ (VC-MTJ) [6][7][8][9] are switched by voltage-controlled magnetic anisotropy (VCMA) effect, providing more promising programming speed, lower programming energy and higher memory density [10,11].…”

Section: Introductionmentioning

confidence: 99%

Adaptive MRAM Write and Read with MTJ Variation Monitor

Wang

Lee

Grèzes

et al. 2021

IEEE Trans. Emerg. Topics Comput.

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Temperature and wafer-level process variations significantly degrade operation efficiency of Spin-transfer torque random access memory (STT-MRAM) and magnetoelectric random access memory (MeRAM), where the write and read reliability issues are exacerbated by the variations. We propose adaptive write and read schemes for highly efficient STT-MRAM and MeRAM programming and sensing that optimally selects write and read pulses to overcome process and temperature variation. With adaptive write, the write latency of STT-MRAM and MeRAM cache are reduced by up to 17% and 59% respectively, and application run time is improved by up to 41%. With adaptive read, the sensing margin is dramatically improved by 1.4X while maintaining read disturbance correctable by error-correcting-code (ECC) correction. To further mitigate read disturbance impact on memory system, additional adaptive read scheme can dynamically lower read voltage according to the proposed monitor result. It can extend memory service time by haft to one year, and reduce read disturbance induced memory failure by 59% to 84%. To better support these schemes, we also propose, design, and evaluate low-cost MTJ-based variation monitor, which precisely senses process and temperature variation. The monitor is over 10X faster, 5X more energy-efficient, and 20X smaller compared with conventional thermal monitors of similar accuracy.

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Comparative Evaluation of Spin-Transfer-Torque and Magnetoelectric Random Access Memory

Cited by 86 publications

References 64 publications

Magnetic Tunnel Junction Applications

Magnetic Tunnel Junction Applications

Accurate Multi-segment Probability Density Estimation Through Moment Matching

Adaptive MRAM Write and Read with MTJ Variation Monitor

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