Compact Modeling of Surface Potential and Drain Current in Multi-layered MoS<sub>2</sub>FETs

Nandan, Keshari; Yadav, Chandan; Rastogi, Priyank; Toral‐Lopez, Alejandro; Marín-Sánchez, Antonio; Marín, Enrique G.; Ruiz, Francisco G.; Bhowmick, Somnath; Chauhan, Yogesh Singh

doi:10.1109/edtm47692.2020.9117875

Cited by 3 publications

(1 citation statement)

References 13 publications

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“…The assumption of constant potential along channel thickness will not be valid as the channel thickness increases from monolayer to multilayer. In this work, we present a surface potential based compact model for drain current of multilayer MoS 2 symmetric doublegate structure including NC effect extending our previous IEEE EDTM-2019 work [33]. In this model, by including the effect of the channel thickness, the current is calculated using Drift-Diffusion transport.…”

Section: Introductionmentioning

confidence: 97%

Compact Modeling of Multi-Layered MoS₂ FETs Including Negative Capacitance Effect

Nandan

Yadav

Rastogi

et al. 2020

IEEE J. Electron Devices Soc.

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In this paper, we present a channel thickness dependent analytical model for MoS2 symmetric double-gate FETs including negative capacitance (NC) effect. In the model development, first thickness dependent model of the baseline 2D FET is developed, and later NC effect is included in the model using the Landau-Khalatnikov (L-K) relation. To validate baseline model behavior, density functional theory (DFT) calculations are taken into account to obtain numerical data for the K and Λ valley dependent effective masses and differences in the energy levels of N-layer (N = 1, 2, 3, 4, and 5) MoS2. The calculated layer dependent parameters using DFT theory are further used in a drift-diffusion simulator to obtain electric characteristics of the baseline 2D FET for model validation. The model shows excellent match for drain current and total gate capacitance of baseline FET and NCFET against the numerical simulation.

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Section: Introductionmentioning

confidence: 97%

Compact Modeling of Multi-Layered MoS₂ FETs Including Negative Capacitance Effect

Nandan

Yadav

Rastogi

et al. 2020

IEEE J. Electron Devices Soc.

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Field-Effect Transistors Based on Two-dimensional Materials (Invited)

Nandan

Naseer

Chauhan

2022

Trans Indian Natl. Acad. Eng.

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A Computationally Efficient Model for FDSOI MOSFETs and Its Application for Delay Variability Analysis

Mao

Chen

et al. 2022

Applied Sciences

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This paper proposes a compact, physics-based current model for fully depleted silicon-on-insulator (FDSOI) MOSFETs and applies it to delay variability analysis. An analytical method is applied to avoid the numerical iterations required in the evaluation of surface potential, which directly improves the computational efficiency. The accuracy of the explicit surface potential approximation is 190.3 nV, which allows for fast convergence. Surface potential and current calculations achieve 1.8× and 1.4× acceleration compared with BSIM-IMG, respectively. To establish the relationship between delay and underlying process parameters, we introduce the effective current and propose a process variation-aware delay prediction model. Higher-order derivatives are calculated to compensate the nonlinearity of delay variations with respect to process parameters. Experiments show a significant improvement in the prediction accuracy with higher-order derivatives, which are proved to be able to handle nonlinearity under process variations. The front gate work function contributes the most to the nonlinearity of the delay variation and the accuracy of the third-order prediction is 4.07%. Under the variation in the channel length and width, front and back gate oxide thickness and body thickness, delay variations have similar characteristics and the second-order prediction is found to be sufficient to model the nonlinearity with a maximum relative error of 1.22%. The delay prediction model only requires a single-point HSPICE DC or transient simulation and is universal for different voltages and different cells. Compared with the Monte Carlo (MC) simulation, the accuracy of the first-order prediction in the above-threshold region (0.8 V) is 0.94%. In the sub-threshold region (0.3 V), a prediction accuracy of 2.01% can be obtained while achieving a 21× reduction in computational time.

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Compact Modeling of Surface Potential and Drain Current in Multi-layered MoS₂FETs

Cited by 3 publications

References 13 publications

Compact Modeling of Multi-Layered MoS₂ FETs Including Negative Capacitance Effect

Compact Modeling of Multi-Layered MoS₂ FETs Including Negative Capacitance Effect

Field-Effect Transistors Based on Two-dimensional Materials (Invited)

A Computationally Efficient Model for FDSOI MOSFETs and Its Application for Delay Variability Analysis

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Compact Modeling of Surface Potential and Drain Current in Multi-layered MoS2FETs

Cited by 3 publications

References 13 publications

Compact Modeling of Multi-Layered MoS2 FETs Including Negative Capacitance Effect

Compact Modeling of Multi-Layered MoS2 FETs Including Negative Capacitance Effect

Field-Effect Transistors Based on Two-dimensional Materials (Invited)

A Computationally Efficient Model for FDSOI MOSFETs and Its Application for Delay Variability Analysis

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Compact Modeling of Surface Potential and Drain Current in Multi-layered MoS₂FETs

Compact Modeling of Multi-Layered MoS₂ FETs Including Negative Capacitance Effect

Compact Modeling of Multi-Layered MoS₂ FETs Including Negative Capacitance Effect