Compact Model of Carrier Transport in Monolayer Transition Metal Dichalcogenide Transistors

Electrothermal transport induced material reconfiguration and performance degradation of CVD-grown monolayer MoS2 transistors

“…Inference made from the time dependence mobility versus temperature data is in agreement with the physics expected to cause time dependent variation in current, discussed earlier. We further validate the proposed introduction of optical phonons and reduction in impurity scattering sites with time by using various theoretical models 36 representing the physics of different scattering mechanisms like ionized impurity scattering, acoustic phonon scattering and optical phonon scattering that degrade mobility in MoS 2 . A detailed discussion on how time dependence, when included in the already existing models, yields similar trend in the time dependence of mobility versus temperature curve as that identified from the experimental data, is provided in Supplementary note 2 (see Supplementary Fig.…”

“…These observations clearly imply that the channel certainly becomes more conductive upon stress under specific conditions and extent to which the channel conductance increases upon stress depends on the gate voltage applied during the stress cycle; for example 1 5 Increase in the conductance of the device along with poor gate control and negative shift in V T implies increase in free-electron concentration in the channel that prevents gate electrode to effectively tune the channel conductance. Moreover, increase in the density of mid-gap states may cause higher sub-threshold and OFF state current by increasing the probability of variable range hopping of electrons between mid-gap states at room temperature 36 . In order to validate the presence of electrical stress induced increase in the electron concentration, Raman and PL spectroscopy of stressed MoS 2 is performed which is discussed in the next section.…”

A Compact Model of MoS2 Field-Effect Transistors From Drift-Diffusion to Ballistic Carrier Transport Regimes

“…For aggressively scaled MoS 2 FETs, to gain a better understanding of this futuristic device and offer early evaluation studies, the improved VS model [12] is employed. Under a small drain-to-source voltage (V ds ), the drain current in linear region (I ds_lin ) can be demonstrated by:…”

“…Several physical-based analytical models [7]- [9] have been proposed for current-voltage (I-V) characteristics of TMD FETs based on the drift-diffusion picture, without applicability to the ballistic and quasi-ballistic regimes [10]- [12]. To perform the ballistic transport effect, some compact models for short-channel devices [10], [11] were proposed but only for the subthreshold region.…”

“…To perform the ballistic transport effect, some compact models for short-channel devices [10], [11] were proposed but only for the subthreshold region. Furthermore, the work of [12] used an improved method of traditional virtual source (VS) model [13] and made the long-channel device models continue to work well at the nanoscale. However, the charge expression in this model was given by a conventional device equation…”