Combinational Logic Design Using Six-Terminal NEM Relays

Abstract

This paper presents techniques for designing nanoelectromechanical relay-based logic circuits using six-terminal relays that behave as universal logic gates. With proper biasing, a compact 2-to-1 multiplexer can be implemented using a single six-terminal relay. Arbitrary combinational logic functions can then be implemented using well-known binary decision diagram (BDD) techniques. Compared to a CMOS-style implementation using four-terminal relays, the BDD-based implementation can result in lower area without major impact on performance metrics such as delay, and energy (when the relays are scaled to small dimensions). Although it is possible to implement any combinational circuit with a single mechanical delay, the relay count can be significantly reduced for complex logic functions by allowing multiple mechanical delays.Index Terms-Binary decision diagram, logic synthesis, nanoelectromechanical (NEM) relays, nanotechnology.

Nanoelectromechanical digital logic circuits using curved cantilever switches with amorphous-carbon-coated contacts

“…Analogous to the p-type and n-type transistors in CMOS logic, a logic cell consists of a pull-up and pulldown network composed of NEM switches whose respective complementary pair is connected by a common gate as one of the inputs of the Boolean logic function. This style of logic differs from alternative topologies that can be obtained from 4-/5-/6-terminal devices [10,13,18,19]. However, where we lose in terms of the capability to use more unique logic styles, we gain in terms of better scalability and optimization at the device level [4,20].…”

“…Several research groups have been or are currently investigating the design and applications of NEM switches for logic applications, including but not limited to [6][7][8][9][10][11][12][13][14][15][16][17][18][19].…”

Biconditional Binary Decision Diagrams: A Novel Canonical Logic Representation Form

“…2. Common logic abstraction for emerging devices: controllable polarity double-gate FETs in silicon nanowires [12], carbon nanotubes [13], graphene [14] but also six terminal nanorelays [15]. a two-terminal binary switch driven by a single input signal.…”

“…Furthermore, the rise of emerging technologies carrying new logic primitives demands for novel logic representation forms that fully exploit a diverse logic expressive power. For instance, controllable polarity double-gate (DG) transistors, fabricated in silicon nanowires [12], carbon nanotubes [13] or graphene [14] technologies, but also nanorelays [15], intrinsically behave as comparators rather than switches. Hence, conventional data structures are not appropriate to model natively their functionality.…”

“…Such feature improves the logic expressive power of the binary decision diagram. Moreover, BBDDs represent also the natural and native design abstraction for emerging technologies [12]- [15] where the circuit primitive is a comparator, rather than a switch.…”