Characterization of ultra-thin oxides using electrical C-V and I-V measurements

The Pulsed Id-Vgmethodology and Its Application to the Electron Trapping Characterization of High-κ gate Dielectrics

“…One technique that requires only two measurements and minimal data analysis was presented in [79]. In this approach, pulsed I d -V g is combined with North Carolina State University's CVC [99] and mob2d [100] modeling parameter extraction software. To extract mobility, mob2d performs a non-linear, least squares fit to experimental pulsed I d data in conjunction with the EOT and substrate doping supplied from CVC.…”

Time dependent dielectric breakdown and stress induced leakage current characteristics of 8Å EOT HfO<inf>2</inf> N-MOSFETS

“…This processing resulted in an EOT of 7.8Å and 8.1Å for the Si and SiGe substrates respectively. These values were extracted from Hauser fitting of C-V curves at 100 kHz to 100MHz [4]. The transmission electron microscope (TEM) image from a sample with almost identical processing in figure 1 shows no detectable interfacial layer and a physical thickness of ~2nm.…”

Atomic Layer Deposition of High k Dielectric and Metal Gate Stacks for MOS Devices

“…C-V data were collected with the frequency at 100 kHz. Wafer EOTs were calculated using Hauser's CVC model [12]. The co-injection ALD employed for HfSiOx ALD [7] was further extended to grow HfSiN films from TEMAHf/Si vapor mixture pulses and alternating pulses of NH 3 .…”