Continuing CMOS performance scaling requires developing MOSFETs of high-mobility semiconductors and InGaAs is a strong candidate for n-channel. InGaAs MOSFETs, however, suffer from high densities of border traps, and their origin and impact on device characteristic are poorly understood at present. In this work, the border traps in nMOSFETs with an In0.53Ga0.47As channel and Al2O3 gate oxide are investigated using the discharging-based energy profiling technique. By analyzing the trap energy distributions after charging under different gate biases, two types of border traps together with their energy distributions are identified. Their different dependences on temperature and charging time support that they have different physical origin. The impact of channel thickness on them is also discussed. Identifying and understanding these different types of border traps can assist in future process optimization. Moreover, border trap study can yield crucial information for long-term reliability modelling and device time-to-failure projection.