Carrier Lifetime and Mobility Enhancement in Nearly Defect-Free Core−Shell Nanowires Measured Using Time-Resolved Terahertz Spectroscopy

Abstract

We have used transient terahertz photoconductivity measurements to assess the efficacy of two-temperature growth and core-shell encapsulation techniques on the electronic properties of GaAs nanowires. We demonstrate that two-temperature growth of the GaAs core leads to an almost doubling in charge-carrier mobility and a tripling of carrier lifetime. In addition, overcoating the GaAs core with a larger-bandgap material is shown to reduce the density of surface traps by 82%, thereby enhancing the charge conductivity.Semiconductor nanowires are promising new materials for implementation in nanoscale electronic and optoelectronic devices. Of particular interest are III-V semiconductor nanowires, which can exhibit a direct bandgap and a high electron mobility.1 However, the large surface-to-volume ratio inherent to nanowires results in the presence of surface traps offering easy access to carrier and exciton recombination pathways.2,3 In addition, one-temperature growth techniques have been shown to cause a significant twin-defect (stacking-defect) density within the nanowires. 4 Refinements in the epitaxial growth of these nanowires are therefore essential in order for their optoelectronic and crystallographic standards to approach those of bulk material.2,6,7 Such efforts are complicated by the fact that electrical measurements conducted on nanowires to determine charge-carrier mobility are often obscured by properties of the electrical contacts. Most contactless spectroscopic probes of nanowires to date have relied upon low-temperature photoluminescence measurements to characterize optoelectronic quality by measuring excitonic dynamics and radiative quantum efficiency. 2,6However, for use of these materials in nanoelectronics and optoelectronics, it is essential to determine charge-carrier mobility and lifetime at room temperature.In this study, we have conducted transient photoconductivity measurements on an ensemble of nanowires in order to assess the effect of nearly defect-free (two-temperature) growth and core-shell encapsulation technologies on charge-carrier trapping and mobility. Optical-pump terahertz-probe spectroscopy was employed as a noncontact ultrafast probe of the room-temperature photoconductivity with subpicosecond resolution. We demonstrate that both two-temperature growth and encapsulation of the GaAs nanowires with a higher band gap material lead to significant increases in the lifetime of free charge carriers. Encapsulation of the nanowires is shown to be highly effective, reducing the areal density of surface traps to one-seventh of that for the untreated wires. Importantly, we find that moving from one-temperature growth to a two-temperature procedure (comprising a brief high-temperature step for nucleation and a longer lower-temperature phase for prolonged growth 4 ) increases the intrinsic carrier mobility of the wires from 1200 cm 2 /(V s) to 2250 cm 2 /(V s).All nanowire samples were initially grown onto a GaAs substrate as shown in a representative scanning electron microscopy ...

Carrier dynamics in semiconductors studied with time-resolved terahertz spectroscopy

“…In a follow-up paper Parkinson et al (2009) correlated the influence of growth conditions of GaAs nanowires and their overcoating with a larger-band gap material on the chargecarrier mobility and lifetime.…”

Mobility Enhancement by Sb-mediated Minimisation of Stacking Fault Density in InAs Nanowires Grown on Silicon

“…Repeated type boundaries in the structure act as scattering sources for the carriers and create a strain in the structure modifying the carrier effective mass and therefore affecting the mobility. 51,52 Figure 10: (a) Nanowire mobility and (b) carrier concentration as a function of the (i) antimony content, (ii) zinc-blende content and (iii) stacking fault density. Red diamonds are room temperature data, blue squares are results obtained at 10 K. Each point is an average of the results obtained for five to ten nanowires.…”

Position-Controlled Uniform GaAs Nanowires on Silicon using Nanoimprint Lithography

“…Whereas for higher flux, the number of 2D GaAs crystals in the holes increases which results in a substantial reduction of yield to about 50% for an As 2 flux of 7.0 × 10 −6 Torr. The tilted NWs in the low flux regime are attributed to the formation of three-dimensional multiple-order twinning due to a low V/III ratio, 45 whereas the 2D crystals in the high flux regime are formed due to a local Asrich environment, hence hindering the VLS NW growth. These results demonstrate the importance of the right As flux for obtaining an optimized yield for a given Ga rate.…”

“…However, due to a very low energy difference for the formation of ZB and WZ phase, they usually contain defects such as stacking faults and twins. Since these structural defects might affect the device functionalities [43][44][45][46], it is necessary to have a good control on the crystal phase of the NW. Therefore a study was focused on controlling the crystal phases of the GaAs NWs by tuning the basic growth parameters, such as V/III flux ratio and growth rate, both in Au-assisted and self-catalyzed GaAs NWs, which are reported in Paper I and II, respectively.…”