Capacitor-Less 4F DRAM Using Vertical InGaAs Junction for Ultimate Cell Scalability<sup />

Kim, Joon Pyo; Sim, Jaeho; Bidenko, Pavlo; Geum, Dae‐Myeong; Kim, Seong Kwang; Shim, Joonsup; Kim, Jongmin; Kim, Sang Hyeon

doi:10.1109/led.2022.3204436

Cited by 2 publications

(1 citation statement)

References 18 publications

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“…[1][2][3] Conventional DRAM with a transistor and capacitor must have a sufficiently large capacitor area to store memory values. [4][5][6][7] Recently, the transistor size has continued to shrink. However, it suffers from capacitor downscaling.…”

Section: Introductionmentioning

confidence: 99%

Simulation of capacitorless DRAM based on polycrystalline silicon with a vertical underlap structure and a separated channel layer

Bae,

Lee,

Park

et al. 2024

Jpn. J. Appl. Phys.

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In this study, a capacitorless one-transistor dynamic random-access memory (1T-DRAM) based on polycrystalline silicon (poly-Si) with a vertical underlap structure and a separated channel layer was designed and analyzed. The memory performance was improved by the vertical underlap structure and the region separated into channel and storage layers. The vertical underlap structure suppressed the recombination rate by storing the holes in the isolated body and could be more easily fabricated than a conventional underlap structure. The thicknesses of the vertical underlap structure and storage region were optimized to enhance the memory performance. When the grain boundary (GB) is centrally located, the proposed 1T-DRAM demonstrates a retention time and sensing margin of 3.618 s and 29.93 μA μm−1, respectively. Even when the GB is in the worst position at T = 358 K, the memory still shows a retention time of 1.991 s and a sensing margin of 4.51 μA μm−1.

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Section: Introductionmentioning

confidence: 99%

Simulation of capacitorless DRAM based on polycrystalline silicon with a vertical underlap structure and a separated channel layer

Bae,

Lee,

Park

et al. 2024

Jpn. J. Appl. Phys.

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Perspectives of Ferroelectric Wurtzite AlScN: Material Characteristics, Preparation, and Applications in Advanced Memory Devices

Qin,

He,

Han

et al. 2024

Nanomaterials

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Ferroelectric, phase-change, and magnetic materials are considered promising candidates for advanced memory devices. Under the development dilemma of traditional silicon-based memory devices, ferroelectric materials stand out due to their unique polarization properties and diverse manufacturing techniques. On the occasion of the 100th anniversary of the birth of ferroelectricity, scandium-doped aluminum nitride, which is a different wurtzite structure, was reported to be ferroelectric with a larger coercive, remanent polarization, curie temperature, and a more stable ferroelectric phase. The inherent advantages have attracted widespread attention, promising better performance when used as data storage materials and better meeting the needs of the development of the information age. In this paper, we start from the characteristics and development history of ferroelectric materials, mainly focusing on the characteristics, preparation, and applications in memory devices of ferroelectric wurtzite AlScN. It compares and analyzes the unique advantages of AlScN-based memory devices, aiming to lay a theoretical foundation for the development of advanced memory devices in the future.

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Capacitor-Less 4F DRAM Using Vertical InGaAs Junction for Ultimate Cell Scalability

Cited by 2 publications

References 18 publications

Simulation of capacitorless DRAM based on polycrystalline silicon with a vertical underlap structure and a separated channel layer

Simulation of capacitorless DRAM based on polycrystalline silicon with a vertical underlap structure and a separated channel layer

Perspectives of Ferroelectric Wurtzite AlScN: Material Characteristics, Preparation, and Applications in Advanced Memory Devices

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