Multi-channel parallel interleaving in the time or frequency domain is a promising architecture to improve the sampling rates of analog-to-digital converters (ADCs) in the medium-to-high resolution data acquisition system. However, the timing interleaving (TI) structure fails to scale up the bandwidth with the more channels, since the input capacitance of the system will increase with more parallel channels, resulting in the decrease of the acquisition bandwidth and the increase of the power consumption. In the mixer-based frequency interleaving (FI) design, this problem is solved at the expense of introducing incomplete image rejection and complexed hardware implementation. In this paper, a boundary mixing (BM) architecture for two-channel frequency-interleaving (FI) ADCs is proposed. In this architecture, the first channel does not require frequency translation and an analog mixer with zero-frequency local oscillator (LO) is adopted to compensate for the propagation delay. The second channel utilizes a real-valued mixer rather than a complex one with an LO of half the sampling frequency of the sampling system. Such a mixing technique shifts wideband input signals into two baseband signals and then decompose the baseband into narrower sub-bands through two identical low-order low-pass filters, limiting the need for high-order analog analysis filters. Further, the effects of some major realization errors are discussed. The simulation results show that, for a BM system with 12-bit subchannel ADCs and third-order Butterworth filters, more than 11 bits of the resolution are attainable everywhere in the desired band with 64-tap finite-impulse response reconstruction filters.INDEX TERMS Analog-to-digital converters (ADCs), boundary mixing (BM), frequency-interleaving (FI), wideband.