2010 3rd International Conference on Computer Science and Information Technology 2010
DOI: 10.1109/iccsit.2010.5564103
|View full text |Cite
|
Sign up to set email alerts
|

Bulk driven OTA in 0.18 micron with high linearity

Help me understand this report

Search citation statements

Order By: Relevance

Paper Sections

Select...
2
1

Citation Types

0
4
0

Year Published

2015
2015
2015
2015

Publication Types

Select...
1

Relationship

0
1

Authors

Journals

citations
Cited by 1 publication
(4 citation statements)
references
References 8 publications
0
4
0
Order By: Relevance
“…The techniques reported in pervious literature for low power input transconductor are: -a) Floating gate MOS differential pair [10,12]. b) Bulk driven MOS differential pair [5,14]. c) Pseudo differential MOS transconductor [8,11].…”
Section: Transconductance Power Minimization Linearity Enhancemenmentioning
confidence: 99%
See 3 more Smart Citations
“…The techniques reported in pervious literature for low power input transconductor are: -a) Floating gate MOS differential pair [10,12]. b) Bulk driven MOS differential pair [5,14]. c) Pseudo differential MOS transconductor [8,11].…”
Section: Transconductance Power Minimization Linearity Enhancemenmentioning
confidence: 99%
“…Using this technique, transistor can remain in active mode even at zero-input bias voltage and also significant improvement in input common-mode range (ICMR) can be observed. However, there are few drawbacks in bulk-driven transistors like one most important drawback is its low dc gain [5]. The current expression for well-input MOS transistor in sub-threshold mode is given by:…”
Section: B Bulk Driven Low Power Techniquementioning
confidence: 99%
See 2 more Smart Citations