Border traps and bias-temperature instabilities in MOS devices

Modification of MIS Devices by Radio-Frequency Plasma Treatment

“…Figure 2 also shows that for the samples not treated by RF plasma one observes negative shifts of voltage across the sample (curve 0). The fact indicates that an accumulation of positive charge in the dielectric takes place and it is in good agreement with the literature and our previous studies [11,12,[15][16][17]. For the MIS structures treated by means of the cylindrical quartz reactor (Fig.…”

“…Calculated from an analysis of experimental data shown in Fig. 2, in accordance to [16][17][18], the crosssections of electron traps, created by the plasma in the SiO 2 film, are in the range of 2 × 10 −15 -10 −16 cm 2 . Reference [12] demonstrates that the arc plasma jet treatment creates electron traps with the cross-sections ten times lower than that for the traps correlated with the hydroxyl groups.…”

Аномальное Поведение Боковой C-v-Характеристики Мноп-Транзистора Со Встроенным Локальным Зарядом В Нитридном Слое

“…Носители тока, достигшие скорости насыщения в канале, имеют энергию достаточную, чтобы преодолеть оксидный барьер и захватываться на ловушках в диэлектрическом слое или на границе раздела канал−оксид, а также для генерации новых дефектов на границе или в оксидном слое. Это может привести к ухудшению характеристик транзистора: к нестабильности, связанной с неравномерным распределением ловушек, деградации порогового напряжения при обратном смещении затвор−исток/сток, проявляющейся при высоких температурах (NBTI-эффект) [1,2]. Масштаб эффектов, в частности, связан с латеральным распределением концентрации оксидных и граничных дефектов вдоль границы [3].…”

Bias temperature instability study on switching defects in SiON and high-K gate dielectrics

“…The discrepancy in the outcome mentioned above between study [115] and other studies [112], [70], [118], [119] In short, while several investigations have proposed the possible role of hydrogen in NBTI [112], [118], its implication seems to be relatively less significant in the state-of-theart, ultra-thin SiON and high-k gate oxide, in which the degradation is dominated by charge trapping [30], [36], [38]- [45], [47], [104]- [108], [115], [120]- [124], [80].…”

“…In addition to the interface traps, the oxide traps, which are also known as border traps, slow states, and anomalous positive charges [79], [80], were discovered in the gate dielectric to be another prime cause of the BTI degradation that contributes to the threshold voltage shift. The oxide traps, being generally electrically neutral in pristine devices, can be through tunneling during the recovery stage voltage at zero or flatband voltage and will be injected later into the n-type substrate.…”