Betweenness centrality on GPUs and heterogeneous architectures

Abstract

The betweenness centrality metric has always been intriguing for graph analyses and used in various applications. Yet, it is one of the most computationally expensive kernels in graph mining. In this work, we investigate a set of techniques to make the betweenness centrality computations faster on GPUs as well as on heterogeneous CPU/GPU architectures. Our techniques are based on virtualization of the vertices with high degree, strided access to adjacency lists, removal of the vertices with degree 1, and graph ordering. By combining these techniques within a fine-grain parallelism, we reduced the computation time on GPUs significantly for a set of social networks. On CPUs, which can usually have access to a large amount of memory, we used a coarse-grain parallelism. We showed that heterogeneous computing, i.e., using both architectures at the same time, is a promising solution for betweenness centrality. Experimental results show that the proposed techniques can be a great arsenal to reduce the centrality computation time for networks. In particular, it reduces the computation time of a 234 million edges graph from more than 4 months to less than 12 days.

The Power of Quasi-Shortest Paths: $\rho$ -Geodesic Betweenness Centrality

“…The complexity of our metric can be further reduced if the algorithm is parallelized, which is a matter of parallelizing the single-source shortest paths (SSSP) and the accumulation functions in Brandes' algorithm [33], considering unweighted networks. This is feasible [34], [35], [36], [37] and the graph traversal performed in the SSSP needs to be run ρ + 1 times to find all the paths we need to compute the ρ-geodesic betweenness. In addition, if only local knowledge is available, it is possible to modify a distributed algorithm as the one proposed by Lehman and Kaufman [38] to compute our metric.…”

Gunrock: a high-performance graph processing library on the GPU

“…The current fastest connectedcomponent algorithm on the GPU is Soman et al's work [34] based on two PRAM connected-component algorithms [14]. There are several parallel Betweenness Centrality implementations on the GPU [10,22,27,31] based on the work from Brandes and Ulrik [2]. Davidson et al [5] proposed a work-efficient SingleSource Shortest Path algorithm on the GPU that explores a variety of parallel load-balanced graph traversal and work organization strategies to outperform other parallel methods.…”

“…All PageRank times are normalized to one iteration. Hardwired GPU implementations for each primitive are b40c (BFS) [24], delta-stepping SSSP [5] (numbers with * are achieved without delta-stepping optimization, otherwise will run out of memory), gpu BC (BC) [31], and conn (CC) [34]. OOM means out-of-memory.…”

Applications of Ear Decomposition to Efficient Heterogeneous Algorithms for Shortest Path/Cycle Problems

“…As graphs corresponding to real-world and practical applications have a massive size, parallel processing is often necessary. It is therefore natural that a lot of current research is directed towards efficient algorithmics on a variety of modern and emerging multi-and many-core architectures [4,28,5,34].…”