Automatic Generation of S-LAM Descriptions from UML/MARTE for the DSE of Massively Parallel Embedded Systems

Abstract

Massively Parallel Multi-Processors System-on-Chip (MP2SoC) architectures require efficient programming models and tools to deal with the massive parallelism present within the architecture. In this paper, we propose a tool which automates the generation of the System-Level Architecture Model (S-LAM) from a Unified Modeling Language-based (UML) model annotated with the Modeling and Analysis of Real-Time and Embedded Systems (MARTE) profile. The S-LAMbased description of the MP2SoC architecture is conformed to the IP-XACT standard. The integration of our generator within a co-design framework provides the specification of the whole MP2SoC system using UML and MARTE. Then, gradual refinements allow the execution of a rapid prototyping process.

Models of Architecture for DSP Systems

“…is thus close to QMoA 1 MART E in terms of resource semantics but additional properties complement the quasi-MoA. In terms of MoAs, QMoA 1 MART E and QMoA 4…”

“…The UML MARTE GRM clause specifies the QMoA 1 MART E quasi-MoA. It corresponds to a graph Λ = M, L,t, p where M is a set of Resources, L is a set of UML Connectors between these resources, t associates types to Resources and p gives sets of properties to Resources.…”

“…The Generic Quantitative Analysis Modeling (GQAM) package defines another quasi-MoA (QMoA 4 MART E ) for performing the following set of analysis: counting the repetitions of an event, determining the probability of an execution, determining CPU requirements, determining execution latency, and determining throughput (time interval between two occurrences). New resources named GaExecHost (Ex-ecutionHost) and GaCommHost (CommunicationHost) are added to the ones of QMoA 1 MART E and specialize the ProcessingResource for time performance and schedulability analysis, as well as for the analysis of other NFPs. QMoA 4…”

On Exploiting Energy-Aware Scheduling Algorithms for MDE-Based Design Space Exploration of MP2SoC

“…In [19], the UML/MARTE methodology for modeling the data-parallel application and the automatic generation of the πSDF specification have been presented. In [20], the automatic generation from the UML/MARTE specification of the S-LAM description of the architecture was explained. The final step in the proposed approach is the rapid prototyping of the πSDF/S-LAM/Scenario combination using PREESM [25].…”

“…An automatic DSE approach that takes advantage from MDE and MARTE was proposed in [19] [20]. It defines two levels of abstraction that alleviate the analysis and generation of data-intensive processing applications running on MP2SoC architectures ( Figure.…”