Analysis and Modeling of Clock-Jitter Effects in Delta-Sigma Modulators

Saad, Ramy A.; Hoyos, Sebastián; Palermo, Samuel

doi:10.5772/46453

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Figure 3 Effects Of Sinc Shaping1

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Cited by 3 publications

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“…However due to the existing high noise level present from the output of a sigma delta modulator the only area this additional noise will effect is the depth of the notch of the in band signal. In [8] an analysis of both CT and DT sigma delta modulator's is carried out. The following equation derives a figure for the pulse width jitter of the output from a pulsed signal modulator.…”

Section: Figure 3 Effects Of Sinc Shapingmentioning

confidence: 99%

FPGA SerDes Capability as Switch mode PA Modulator

Finnerty

Dooley

Farrell

2014

25th IET Irish Signals &Amp; Systems Conference 2014 and 2014 China-Ireland International Conference on Information and Communi

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Abstract-This paper demonstrates the ability of current commercially available FPGA hardware to generate radio frequency pulsed modulated signals. This work is carried out to determine the suitability of integrated SerDes devices for use in frequency flexible transmitters capable of modulating switch mode power amplifiers (SMPA's). The paper shows that it is possible to meet spectral mask requirements of -50dBc for WCDMA signals at carrier frequencies in digital dividend from 750MHz to 1GHz.

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Section: Figure 3 Effects Of Sinc Shapingmentioning

confidence: 99%