An efficient task mapping algorithm with power-aware optimization for network on chip

Hu, Wei; Shi, Qingsong; Wang, Yonghao; Zhang, Kai; Li, Jun; Liu, Xiaoming; Guo, Hong

doi:10.1016/j.sysarc.2016.04.006

Cited by 8 publications

(6 citation statements)

References 28 publications

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“…The major one worth discussing is to control temperature via thread migration from "hot" to "cold" cores, taking care to maximize performance [17]- [19]. However, the time for a task migration can vary by orders of magnitude depending on the presence or absence of hardware support, and depends on unpredictable facts like the amount of memory/cache to move [20], [21]. Also, and most important, exploiting task migration means bringing into play relevant parts of the operating systems-most notably, the scheduler-that already have to obey a number of other constraints.…”

Section: Problem Overviewmentioning

confidence: 99%

Event-Based Power/Performance-Aware Thermal Management for High-Density Microprocessors

Leva

Terraneo

Giacomello

et al. 2018

IEEE Trans. Contr. Syst. Technol.

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The density of modern microprocessors is so high, that operating all their units at full power would destroy them by thermal runaway. Hence, thermal control is vital, but at the same time has to integrate with power/performance management, to not unduly limit computational speed. In addition, the controller must be simple and computationally light, as millisecond-scale response is required. Finally, since microprocessors face a variety of operating conditions, postsilicon tuning is an issue. We here present a solution, by exploiting event-based control and a hardware/software partition to maximize efficiency, lightness, and flexibility. We show experiments on real hardware, evidencing the obtained advantages over the state of the art

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Section: Problem Overviewmentioning

confidence: 99%

Event-Based Power/Performance-Aware Thermal Management for High-Density Microprocessors

Leva

Terraneo

Giacomello

et al. 2018

IEEE Trans. Contr. Syst. Technol.

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“…In a core graph, an application will be divided into several IP cores, and the core graph records each IP core's id and communication between each pair of IP cores. The communication recorded can be the total number of communication flits, the bandwidth, and so on [25], [26]. Compared with the communication matrices, core graphs are usually fixed in size for each application, potentially limiting their usage in salable distributed parallel systems' study.…”

Section: B Influence Of Crosstalk On the Laser Energy Fluctuationsmentioning

confidence: 99%

“…Though Netrace reflects the cores' communication in a multi-core system, it can only provide traces for a 64-core system, which limits its usage for salable systems study. Wei Hu et al proposed a task mapping optimization algorithm to realize power saving in an electrical mesh network [26]. This work generates tasks and traffics based on a full system simulator, a dynamic task mapping strategy, and an on-chip network simulator.…”

Section: P Ro Loss =mentioning

confidence: 99%

Impact of Application Characteristics on Laser Energy Fluctuation in Integrated Photonic Switching Systems

Wang

Yang

et al. 2023

IEEE Photonics J.

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Laser energy cost is one of the primary energy budgets in integrated photonic switching systems. Traditional photonic switch testing injects random traffic to the switches, which only generates a "static" laser energy cost result. However, the laser's energy per bit performance fluctuates due to different process mapping scenarios of applications. In this paper, we did experiments to study the influence of the application's process mapping on the photonic switches' injection traces. Then we built a model to show the connection between the traces and the laser's energy per bit performance. To get the energy fluctuation results quickly and accurately, we propose a heuristic-based energy boundary searching methodology, with the model we built being considered. We also analyze the speedup and convergence of the methodology. Two photonic switches are studied under five kinds of application traces. The study shows an over 60% searching speedup and 90% accuracy in most cases, compared with the enumeration method, and the lasers' energy fluctuations vary from nearly 0% to over 150%. We further analyze the factors inducing such huge fluctuation variations, and a qualitative criterion that predicts the magnitude of the variations is proposed and discussed.

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“…In [105], a mapping scheme by power-aware optimization of NOC is presented. Tasks tra c is investigated.…”

Section: Energy-aware Schemesmentioning

confidence: 99%

Towards Task Mapping Approaches in Network on Chips: A Comprehensive Survey

Màsdàrí

2023

Preprint

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One of the main stages of Network on Chip (NoC) is task mapping where the application tasks are mapped to the processing resources. Task mapping decisions have a direct impact on the NoC performance and can be classified as static or dynamic mapping methods. In this paper, we carry out a comprehensive systematic study of task mapping schemes in various NoCs. For this purpose, firstly, an overview of the task mapping's main concepts is presented. Then, a taxonomy of the mapping schemes regarding their objectives and applied mapping factors is presented and the studied schemes are categorized into fault-tolerant schemes, congestion-aware schemes, communication-aware approaches, temperature-aware methods, and energy-aware schemes. Afterward, their main contributions, provided services, and drawbacks of the proposed studies in the literature are illustrated. Moreover, a comprehensive discussion of various features of the investigated mapping methods is presented and issues such as the applied algorithms, simulators, datasets, and evaluation metrics are discussed. Finally, the concluding issues and open research areas are highlighted.

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An efficient task mapping algorithm with power-aware optimization for network on chip

Cited by 8 publications

References 28 publications

Event-Based Power/Performance-Aware Thermal Management for High-Density Microprocessors

Event-Based Power/Performance-Aware Thermal Management for High-Density Microprocessors

Impact of Application Characteristics on Laser Energy Fluctuation in Integrated Photonic Switching Systems

Towards Task Mapping Approaches in Network on Chips: A Comprehensive Survey

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