An efficient and compact row buffer architecture on FPGA for real-time neighbourhood image processing

Kazmi, Majida; Aziz, Arshad; Akhtar, Pervez

doi:10.1007/s11554-017-0690-7

Cited by 4 publications

(1 citation statement)

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“…Moreover, the cache should be built to store the required image data. Many research studies have made efforts to design the structure of a buffer, such as [29][30][31][32]. Especially, the structure of a state machine [32] is a useful method for solving the issue of buffers.…”

Section: Fpga-based Implementation For a Two-row Buffermentioning

confidence: 99%

On-Board Ortho-Rectification for Images Based on an FPGA

et al. 2017

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Abstract:The traditional ortho-rectification technique for remotely sensed (RS) images, which is performed on the basis of a ground image processing platform, has been unable to meet timeliness or near timeliness requirements. To solve this problem, this paper presents research on an ortho-rectification technique based on a field programmable gate array (FPGA) platform that can be implemented on board spacecraft for (near) real-time processing. The proposed FPGA-based ortho-rectification method contains three modules, i.e., a memory module, a coordinate transformation module (including the transformation from geodetic coordinates to photo coordinates, and the transformation from photo coordinates to scanning coordinates), and an interpolation module. Two datasets, aerial images located in central Denver, Colorado, USA, and an aerial image from the example dataset of ERDAS IMAGINE 9.2, are used to validate the processing speed and accuracy. Compared to traditional ortho-rectification technology, the throughput from the proposed FPGA-based platform and the personal computer (PC)-based platform are 11,182.3 kilopixels per second and 2582.9 kilopixels per second, respectively. This means that the proposed FPGA-based platform is 4.3 times faster than the PC-based platform for processing the same RS images. In addition, the root-mean-square errors of the planimetric coordinates ϕ X and ϕ Y and the distance ϕ S are 1.09 m, 1.61 m, and 1.93 m, respectively, which can meet the requirements of correction accuracy in practice.

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Section: Fpga-based Implementation For a Two-row Buffermentioning

confidence: 99%