An avalanche current path optimizing method for superjunction MOSFET to enhance unclamped inductive switching capability

Ren, Min; Deng, Gaoqiang; Zhang, M.; Zhang, L. X.; Li, Z. H.; Zhang, B.

doi:10.1109/icccas.2013.6765243

Cited by 3 publications

(1 citation statement)

References 6 publications

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“…However, the excessive doping concentration in the P-base region will cause the device threshold to be too large, so the improvement of E AS is limited. Some researchers also proposed to extend the source deep into the P-base area to improve the current flow path [2]. However, the device blocking voltage is more sensitive to the source deep in the P-base area.…”

Section: Introductionmentioning

confidence: 99%

A Novel Structure of Super-junction MOSFET with Improved Avalanche Energy Capability

Hou-yong

Chen

2023

J. Phys.: Conf. Ser.

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The UIS characteristic of the device is a key parameter of the super-junction MOSFET, which represents the reliable performance of the device in the face of extreme conditions. The maximum avalanche energy (EAS ) that the device can withstand under a single pulse of the gate electrode or the maximum avalanche energy (EAR ) that the device can withstand under multiple pulses of the gate electrode is commonly used in the industry to characterize the UIS characteristic. To solve the avalanche energy problem of super-junction MOSFET, we propose a novel structure of super-junction MOSFET with a P-type diffused region on the top of the N-column drift region.

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Section: Introductionmentioning

confidence: 99%