An AC conductance technique for measuring self-heating in SOI MOSFET's

Tu, R.; Wann, C.; King, J.C.; Ko, P.K.; Hu, Chenming

doi:10.1109/55.386025

Cited by 63 publications

(23 citation statements)

References 7 publications

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“…In order to reduce the influence of self-heating on the measured device characteristics, an AC drain conductance method [22], [23] was used to determine the output characteristics. In this technique, drain current characteristics are obtained by integrating the ac measured at a frequency (6 MHz) faster than typical thermal time constants of self-heating (microseconds).…”

Section: Electrical Characteristicsmentioning

confidence: 99%

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Fabrication and analysis of deep submicron strained-Si n-MOSFET's

Rim

Hoyt

Gibbons

2000

IEEE Trans. Electron Devices

346

134

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Abstract-Deep submicron strained-Si n-MOSFET's were fabricated on strained Si/relaxed Si 0 8 Ge 0 2 heterostructures. Epitaxial layer structures were designed to yield well-matched channel doping profiles after processing, allowing comparison of strained and unstrained Si surface channel devices. In spite of the high substrate doping and high vertical fields, the MOSFET mobility of the strained-Si devices is enhanced by 75% compared to that of the unstrained-Si control devices and the state-of-the-art universal MOSFET mobility. Although the strained and unstrained-Si MOSFET's exhibit very similar short-channel effects, the intrinsic transconductance of the strained Si devices is enhanced by roughly 60% for the entire channel length range investigated (1 to 0.1 m) when self-heating is reduced by an ac measurement technique. Comparison of the measured transconductance to hydrodynamic device simulations indicates that in addition to the increased low-field mobility, improved high-field transport in strained Si is necessary to explain the observed performance improvement. Reduced carrier-phonon scattering for electrons with average energies less than a few hundred meV accounts for the enhanced high-field electron transport in strained Si. Since strained Si provides device performance enhancements through changes in material properties rather than changes in device geometry and doping, strained Si is a promising candidate for improving the performance of Si CMOS technology without compromising the control of short channel effects.

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Section: Electrical Characteristicsmentioning

confidence: 99%

“…8(a)]]. The ac technique has been successfully applied to the characterization of SOI devices [22], [23]. The open circles in Fig.…”

Section: Electrical Characteristicsmentioning

confidence: 99%

Fabrication and analysis of deep submicron strained-Si n-MOSFET's

Rim

Hoyt

Gibbons

2000

IEEE Trans. Electron Devices

346

134

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“…The first partial derivative in (3) clearly coincides with , while (4) Finally, by substituting (4) into (3), we obtain (5) where:…”

Section: Measurement Techniquementioning

confidence: 99%

“…With respect to other approaches [4], [5] based on small-signal electrical measurements, the method proposed does not require the identification of a physics-based model of the TSP, which may be difficult to extract and usually requires a detailed knowledge of the device physical parameters. …”

Section: Introductionmentioning

confidence: 99%

A New Technique for Thermal Resistance Measurement in Power Electron Devices

Filicori

Rinaldi

Vannini³

et al. 2005

IEEE Trans. Instrum. Meas.

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Abstract-A simple technique is proposed for the thermal resistance measurement of electron devices. The new approach is based on the standard measurements which are normally carried out for the electrical characterization of power devices, without requiring special-purpose instrumentation and/or physics-based temperature-dependent electrical device models. Experimental results, which confirm the validity of the new method, are provided.

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“…R th and C th must be treated as unknowns. Complex AC [2] and pulse [3] techniques have been proposed for obtaining SHE-free IV data. In this work, we will use the AC drain output conductance (g ds ) data at one bias point to characterize both R th and C th .…”

Section: Introductionmentioning

confidence: 99%

Self-heating characterization for SOI MOSFET based on AC output conductance

Wei¹,

Fung

Liu

et al.

International Electron Devices Meeting 1999. Technical Digest (Cat. No.99CH36318)

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A simple and accurate characterization method for the self-heating effect in SOI MOSFET is reported for the first time. The AC output conductance at one bias point and several frequencies are measured to determine the thermal resistance (R th ) and thermal capacitance (C th ) associated with SOI devices. The proposed methodology is critical for removing the misleadingly large self-heating effect from the DC IV data in device modeling.

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An AC conductance technique for measuring self-heating in SOI MOSFET's

Cited by 63 publications

References 7 publications

Fabrication and analysis of deep submicron strained-Si n-MOSFET's

Fabrication and analysis of deep submicron strained-Si n-MOSFET's

A New Technique for Thermal Resistance Measurement in Power Electron Devices

Self-heating characterization for SOI MOSFET based on AC output conductance

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