Accelerating Binary String Comparisons with a Scalable, Streaming-Based System Architecture Based on FPGAs

Pilz, Sarah; Porrmann, Florian; Kaiser, Martin; Hagemeyer, Jens; Hogan, James M.; Rückert, Ulrich

doi:10.3390/a13020047

Cited by 8 publications

(8 citation statements)

References 29 publications

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“…This is a very simple example as the length is very short, but it is still illustrative. Hamming distance between longer strings using OpenCL on FPGA has been addressed in [34]. As depicted in FIGURE 9 the circuit has two phases, the equality check of each base, and the counting of equals.…”

Section: A Basic Operations and Arbitrary Precision Integersmentioning

confidence: 99%

FPGA Acceleration of Pre-Alignment Filters for Short Read Mapping With HLS

et al. 2022

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Pre-alignment filters are useful for reducing the computational requirements of genomic sequence mappers. Most of them are based on estimating or computing the edit distance between sequences and their candidate locations in a reference genome using a subset of the dynamic programming table used to compute Levenshtein distance. Some of their FPGA implementations of use classic HDL toolchains, thus limiting their portability. Currently, most FPGA accelerators offered by heterogeneous cloud providers support C/C++ HLS. In this work, we reimplement and optimize several state-of-the-art pre-alignment filters using C/C++ based HLS to expand their portability to a wide range of systems supporting the OpenCL runtime. Moreover, we perform a complete analysis of the performance and accuracy of the filters and analyze the implications of the results. The maximum throughput obtained by an exact filter is 95.1 MPairs/s including memory transfers using 100 bp sequences, which is the highest ever reported for a comparable system and more than two times faster than previous HDL-based results. The best energy efficiency obtained from the accelerator (not considering host CPU) is 2.1 MPairs/J, more than one order of magnitude higher than other accelerator-based comparable approaches from the state of the art.

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Section: A Basic Operations and Arbitrary Precision Integersmentioning

confidence: 99%

FPGA Acceleration of Pre-Alignment Filters for Short Read Mapping With HLS

et al. 2022

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“…The high computing latency is due to the high number of cores and low cache memory to control these cores. In contrast to GPUs, FPGAs are customizable according to the user's needs, achieving better computing performance and lower latency [14,44,45]. However, FPGA hardware development is usually complex and takes a long time.…”

Section: Related Workmentioning

confidence: 99%

Parallel Implementation of Smith-Waterman Algorithm on FPGA

Oliveira

Dias

Fernandes

2021

Preprint

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In bioinformatics, alignment is an essential technique for finding similarities between biological sequences. Usually, the alignment is performed with the Smith-Waterman (SW) algorithm, a well-known sequence alignment technique of high-level precision based on dynamic programming. However, given the massive data volume in biological databases and their continuous exponential increase, high-speed data processing is necessary. Therefore, this work proposes a parallel hardware design for the SW algorithm with a systolic array structure to accelerate the Forward and Backtracking steps. For this purpose, the architecture calculates and stores the paths in the Forward stage for pre-organizing the alignment, which reduces the complexity of the Backtracking stage. The backtracking starts from the maximum score position in the matrix and generates the optimal SW sequence alignment path. The architecture was validated on Field-Programmable Gate Array (FPGA), and synthesis analyses have shown that the proposed design reaches up to 79.5 Giga Cell Updates per Second (GCPUS).

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“…The high computing latency is due to the high number of cores and low cache memory to control these cores. In contrast to GPUs, FPGAs are customizable according to the user’s needs, achieving better computing performance and lower latency [ 15 , 54 , 55 ]. However, FPGA hardware development is usually complex and takes a long time.…”

Section: Introductionmentioning

confidence: 99%

Proposal of Smith-Waterman algorithm on FPGA to accelerate the forward and backtracking steps

2022

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In bioinformatics, alignment is an essential technique for finding similarities between biological sequences. Usually, the alignment is performed with the Smith-Waterman (SW) algorithm, a well-known sequence alignment technique of high-level precision based on dynamic programming. However, given the massive data volume in biological databases and their continuous exponential increase, high-speed data processing is necessary. Therefore, this work proposes a parallel hardware design for the SW algorithm with a systolic array structure to accelerate the forward and backtracking steps. For this purpose, the architecture calculates and stores the paths in the forward stage for pre-organizing the alignment, which reduces the complexity of the backtracking stage. The backtracking starts from the maximum score position in the matrix and generates the optimal SW sequence alignment path. The architecture was validated on Field-Programmable Gate Array (FPGA), and synthesis analyses have shown that the proposed design reaches up to 79.5 Giga Cell Updates per Second (GCPUS).

show abstract

Accelerating Binary String Comparisons with a Scalable, Streaming-Based System Architecture Based on FPGAs

Cited by 8 publications

References 29 publications

FPGA Acceleration of Pre-Alignment Filters for Short Read Mapping With HLS

FPGA Acceleration of Pre-Alignment Filters for Short Read Mapping With HLS

Parallel Implementation of Smith-Waterman Algorithm on FPGA

Proposal of Smith-Waterman algorithm on FPGA to accelerate the forward and backtracking steps

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