A wearable human activity recognition system on a chip

Abstract

The availability of cheap wearable motion and biometric sensors has favoured the research on wearable human activity recognition (HAR) systems. However, a HAR system comprehends many complex signal processing stages that usually require some computationally demanding operations which can hardly be directly performed in an embedded system. Modern FPGA technologies and the system-on-chip (SoC) approach open the door to the implementation of complex single-chip signal processing systems to produce tiny, wearable and autonomous embedded HAR systems. However, compared to a pure embedded software approach, the potentially higher performance-to-power ratio of FPGAs can only be exploited in very demanding applications and by a careful design of the implemented system. In this work we describe a first step in the consecution of an FPGA-based completely autonomous singlechip HAR system which can be adapted and optimized to the user with no need of external computing means neither of human intervention. The system includes all stages in a HAR process, i.e., signal segmentation, signal processing for feature extraction, input space dimensionality reduction (feature selection), and activity estimation by means of a neural classifier. A physical activity recognition example is used as a reference design to evaluate the performance of the system and to draw conclusions on the potential benefits of using FPGAs in future wearable HAR applications.

Efficient FPGA Implementation of Multilayer Perceptron for Real-Time Human Activity Classification

“…Yan et al [29] tested the MLP based HAR design on the two different FPGAs and got impressive results compared to the smartphones implementations. Basterretxea et al [22] implemented an MLP algorithm on FPGA (Xilinx XC6SLX45CSG324-2) for the generalized HAR system. These work motivated us to implement efficient hardware based activity classification for the smart military wearables.…”

“…In works [32], [34], classification algorithms are implemented on the smartphone platform with floating point data precision. The work presented in [22] and this work implemented a classification algorithm on the customized hardware with fixed bit precision. The comparison shows that the accuracy of the proposed classifier outperforms all implementations.…”

“…Due to difficult combat conditions, the hardware of smart wearables has to meet the stringent system requirements like fast response time, high performance per watt ratio, small form factor, higher reliability and flexibility [10]. Such requirements are achievable only by using parallel processing hardware solutions like FPGAs [22], [28]. The efficient implementation of an activity recognition algorithm on such devices plays a crucial role in wearable system performance.…”

“…Hence, the hardware is a favorable choice for HAR implementation for the challenging applications. Few attempts of HAR algorithm implementation on reconfigurable hardware are reported in the literature [22], [29], [30]. These implementations are focused on the hardware design and modeling of activity classifier.…”

Human Activity Recognition Based on Multimodal Body Sensing

“…Obtaining the PCA of a particular dataset, allows us to capture the maximum variability in the data without any loss of information [14]. PCA transformation is also a pretty convenient way of achieving dimensionality reduction since it extracts all of the meaningful feature information without us having to provide any additional information regarding the data source or domain knowledge regarding the problem that we are trying to solve [15].…”