A Simplified Synthesis of Transmission Lines with a Tree Structure

Zhou, Dian; Su, Shun-Lin; Tsui, Frank; Gao, Di; Cong, Jason

doi:10.1007/978-1-4615-2718-3_3

Cited by 8 publications

(11 citation statements)

References 8 publications

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“…Transient s i m ulation of lossy interconnects based on convolution techniques is presented in 8,12 . Faster techniques based on moment computations are proposed in 11,16,17 . Since these methods are too expensive to be used during iterative l a yout optimization, the Elmore delay 2 approximation which represents the rst moment o f the transfer function is now widely used in the performancedriven design of clock distribution and Steiner global routing topologies.…”

Section: Introductionmentioning

confidence: 99%

An analytical delay model for RLC interconnects

Kahng

Muddu

1997

IEEE Trans. Comput.-Aided Des. Integr. Circuits Syst.

209

119

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We develop an analytical delay model based on rst and second moments to incorporate inductance e ects into the delay e s t imate for interconnection lines. Delay estimates using our analytical model are within 15 of SPICE-computed delay across a wide range of interconnect parameter values. We also extend our delay model for estimation of source-sink delays in arbitrary interconnect trees. For the small tree topology considered, we observe improvements of at least 18 in the accuracy of delay estimates when compared to the Elmore model which i s i n d ependent of inductance, even though our estimates are as easy to compute as Elmore delay. The speedup of delay estimation via our analytical model is several orders of magnitude when compared to a simulation methodology such as SPICE.

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Section: Introductionmentioning

confidence: 99%

An analytical delay model for RLC interconnects

Kahng

Muddu

1997

IEEE Trans. Comput.-Aided Des. Integr. Circuits Syst.

209

119

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“…The two-pole methodology for interconnect response computation under step input has been discussed in [4,7,20]. For interconnect trees (or lines) the transfer function has a special form in which the numerator polynomial is a constant, i.e., approximating to s 2 term yields Hs…”

Section: Two-pole Analysismentioning

confidence: 99%

Analytical delay models for VLSI interconnects under ramp input

Kahng¹,

Masuko²,

Muddu³

Proceedings of International Conference on Computer Aided Design

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Elmore delay has been widely used as an analytical estimate of interconnect delays in the performance-driven synthesis and layout of VLSI routing topologies. However, for typical RLC interconnections with ramp input, Elmore delay can deviate by up to 100% or more from SPICEcomputed delay since it is independent of rise time of the input ramp signal. We develop new analytical delay models based on the first and second moments of the interconnect transfer function when the input is a ramp signal with finite rise time. Delay estimates using our first moment based analytical models are within 4% of SPICE-computed delay, and models based on both first and second moments are within 2:3% of SPICE, across a wide range of interconnect parameter values. Evaluation of our analytical models is several orders of magnitude faster than simulation using SPICE. We also describe extensions of our approach for estimation of source-sink delays in arbitrary interconnect trees.

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“…Previous two-pole methods calculate the two dominant poles of the transfer function from the first and second moments by modeling each distributed line separately with uniform equivalent circuits [Hor84, GZ931. To improve the accuracy of the response, Zhou et al [ZSTGC94] consider a special polynomial function that describes the poles by heuristically incorporating a model proposed by [ZPKSl]. To further improve accuracy, the authors of [ZSTGC94] model each tree branch by many (uniform) shorter segments.…”

Section: Interconnect Tree Analysismentioning

confidence: 99%

“…To improve the accuracy of the response, Zhou et al [ZSTGC94] consider a special polynomial function that describes the poles by heuristically incorporating a model proposed by [ZPKSl]. To further improve accuracy, the authors of [ZSTGC94] model each tree branch by many (uniform) shorter segments. This method may not be practical for trees with long wire segments (e.g., on an MCM substrate, where a lossy transmission line model is most relevant).…”

Section: Interconnect Tree Analysismentioning

confidence: 99%

“…-T c2 T -T CO -T Because non-uniform equivalent circuits match the distributed line moments accurately, using such equivalent circuits in a two-pole or higher-order approximation of the transfer function will achieve a more accurate voltage response than simply using uniform segment models (e.g., as in [ZSTGC94]). For large routing trees such as in MCM substrates, the use of non-uniform equivalent circuit models will reduce computation time significantly.…”

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confidence: 99%

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Two-pole analysis of interconnection trees

Kahng¹,

Muddu²

Proceedings of 1995 IEEE Multi-Chip Module Conference (MCMC-95)

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We address the two-pole simulation of interconnect trees via the moment matching technique. We simulate the interconnect network by modeling the distributed lines with non-uniform lumped segments and using the two-pole methodology. To this end, we derive new nonuniform equivalent circuits which match the general distributed line transfer function up t o the second term. Using the recursive equation for the admittance of a tree, we give the exact expressions for the first and second moments of the transfer function of the interconnect tree. Our results show that delay estimates using our method are within 13% of SPICE-computed delays. As routing trees become bigger and interconnection lines become longer, e.g., in MCM design, our approach has advantages in both accuracy and simulation complexity. significant.

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A Simplified Synthesis of Transmission Lines with a Tree Structure

Cited by 8 publications

References 8 publications

An analytical delay model for RLC interconnects

An analytical delay model for RLC interconnects

Analytical delay models for VLSI interconnects under ramp input

Two-pole analysis of interconnection trees

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