DOI: 10.1109/iedm.2006.346883
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Abstract: SRAMs are an integral part of system on chip devices. With transistor and gate length scaling to 65nm/45nm nodes, SRAM stability across the product's lifetime has become a challenge. Negative bias temperature instability, defects, or other phenomena that may manifest itself as a transistor threshold voltage (V T ) increase can result in VMIN drift of SRAM memory cells through burn-in and/or operation. A direct assessment at time-zero is difficult because the transistor V T has not yet shifted, and therefore n…

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