2018 IEEE International Solid - State Circuits Conference - (ISSCC) 2018
DOI: 10.1109/isscc.2018.8310218
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A PUF scheme using competing oxide rupture with bit error rate approaching zero

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Cited by 68 publications
(32 citation statements)
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“…-Optical PUF [20], -Coating PUF [28], -SRAM PUF [9], -Glitch PUF [27], -Arbiter PUF [19,6], -Loop PUF [4], -Memory contention PUF [8], -Oxide rupture PUF [29], -Transistor voltage threshold [26].…”
Section: Towards a Standard Related To Pufsmentioning
confidence: 99%
See 1 more Smart Citation
“…-Optical PUF [20], -Coating PUF [28], -SRAM PUF [9], -Glitch PUF [27], -Arbiter PUF [19,6], -Loop PUF [4], -Memory contention PUF [8], -Oxide rupture PUF [29], -Transistor voltage threshold [26].…”
Section: Towards a Standard Related To Pufsmentioning
confidence: 99%
“…However, some PUFs are prepared by the foundry, but must be "revealed" later on (like a photographic picture after exposition). For example, the oxide rupture PUF [29] is not operational right after fabrication, but becomes operational subsequent to some locking process. Besides, some PUFs are not steady by nature, and for them to be of practical use, their overall steadiness must be improved by removing those entropy sources which are the less steady.…”
Section: Puf Life-cyclementioning
confidence: 99%
“…In recent PUF works [2]- [7], the stability is considered as a major concern, since it usually takes more resource to be optimized. On the other hand, a PUF with an excellent native stability, i.e.…”
Section: A Stability Of Pufmentioning
confidence: 99%
“…The bit stability in such case is usually good but is out of scope for this work, since it is linked to the specific device physics. The other approach is based on aging effects that can be electrically induced, such as biasedtemperature instability (BTI) [3], hot-carrier injection (HCI) [4] and oxide breakdown (BD) [5]- [7]. In this paper, we will focus on the stability aspects of our proposed PUF using soft oxide breakdown (SBD), namely soft-BD PUF, with detailed experiments on the chips fabricated in 40nm.…”
Section: B Approaches Towards Ideal Stabilitymentioning
confidence: 99%
“…This event appears the first time the two RRAMs are brought in competition, after which it becomes repetitive. The idea of competing elements for the generation of unpredictable bits has also been proposed with AF gates [17]. The association of RRAMs has already been exploited for hardware security applications [18]- [21].…”
Section: Introductionmentioning
confidence: 99%