A novel nonvolatile memory with spin torque transfer magnetization switching: spin-ram

Hosomi, Masanori; Yamagishi, H.; Yamamoto, Tomohiko; Bessho, K.; Higo, Y.; Yamane, K.; Yamada, H.; Shoji, M.; Hachino, H.; Fukumoto, C.; Nagao, Hajime; Kano, Hiroshi

doi:10.1109/iedm.2005.1609379

Cited by 621 publications

(358 citation statements)

References 7 publications

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“…[9][10][11] Reduction of the high critical current for CIMS is necessary for spin-transfer controlled magnetic memories. 12 Double-barrier magnetic tunnel junctions ͑DBMTJs͒ consist of a central metallic layer between two insulating barriers and two FM electrodes. The tunneling magnetoresistance ͑TMR͒ can be dramatically enhanced in collinear DBMTJs by the presence of quantum well states ͑QWSs͒ under appropriate resonant conditions.…”

Section: Introductionmentioning

confidence: 99%

Enhancing spin-transfer torque through the proximity of quantum well states

2007

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We predict that the spin-transfer, T i,ʈ , and fieldlike, T i,Ќ , components of the local spin torque are dramatically enhanced in double-barrier magnetic tunnel junctions. The spin-mixing enhancement is due to the energetic proximity of majority and minority quantum well states ͑QWSs͒ of different quantum numbers within the bias window. The local-spin-torque enhancement is not associated with a corresponding enhancement of the spinpolarized currents. T i,ʈ exhibits a switch-on and switch-off steplike bias behavior when spin-polarized QWSs enter the bias window or exit the energy band, while T i,Ќ changes sign between switch-on biases. The net T Ќ exhibits an anomalous angular behavior due to the bias interplay of the bilinear and biquadratic effective exchange couplings.

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Section: Introductionmentioning

confidence: 99%

Enhancing spin-transfer torque through the proximity of quantum well states

2007

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“…Since the spin transfer torque effect was first incorporated into MTJ switching [1], MRAMs have exclusively used this effect for writing. The STT effect, however, can complement the field driven excitation of the magnetic free layer within an MTJ.…”

Section: Field Driven Stt-mram Cellmentioning

confidence: 99%

“…Magnetic tunnel junctions are two terminal resistive elements that operate on the principle of spin dependant conduction through magnetic domains [1]- [3]. The device is a stack of ferromagnetic metal on both sides of a tunneling oxide spacer.…”

Section: Mtj Operationmentioning

confidence: 99%

Field driven STT-MRAM cell for reduced switching latency and energy

Patel

Ïpek

Friedman

2014

2014 IEEE International Symposium on Circuits and Systems (ISCAS)

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Abstract-A field driven approach to STT-MRAM switching is proposed as a method for reducing the switching latency of an MTJ in high performance caches. An MRAM array model is presented to characterize the switching energy and maximum achievable reduction in energy using the field driven approach. The switching latency per bit is reduced by more than a factor of ten. The resultant switching energy per bit is reduced by 82% as compared to a standard STT-MRAM.

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“…In spin transfer torque RAM (STT-RAM) [9], the magnetic direction of the free layer is changed by directly passing spinpolarized currents through MTJ, using the "1T1J" structure, where one NMOS transistor is connected to one MTJ, as shown in Fig. 1.…”

Section: Magnetoresistive Rammentioning

confidence: 99%

The salvage cache: A fault-tolerant cache architecture for next-generation memory technologies

Koh¹,

Wong

Chen³

et al. 2009

2009 IEEE International Conference on Computer Design

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Abstract-There has been much work on the next generation of memory technologies such as MRAM, RRAM and PRAM. Most of these are non-volatile in nature, and compared to SRAM, they are often denser, just as fast, and have much lower energy consumption. Using 3-D stacking technology, it has been proposed that they can be used instead of SRAM in large level 2 caches prevalent in today's microprocessors. However, one of the key challenges in the use of these technologies, such as MRAM, is their higher fault probabilities arising from the larger process variation, defects in its fabrication, and the fact that the cache is much larger. This seriously affect yield. In this paper, we propose a fault resilient set associative cache architecture which we called the salvage cache. In the salvage cache, a faulty cache block is sacrificed and used to repair faults found in other blocks. We will describe in detail the architecture of the salvage cache as well as provide results of yield simulations that show that a much higher yield can be achieved viz-a-viz other fault tolerant techniques. We will also show the performance savings that arise from the use of a large next-generation L2 cache.

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A novel nonvolatile memory with spin torque transfer magnetization switching: spin-ram

Cited by 621 publications

References 7 publications

Enhancing spin-transfer torque through the proximity of quantum well states

Enhancing spin-transfer torque through the proximity of quantum well states

Field driven STT-MRAM cell for reduced switching latency and energy

The salvage cache: A fault-tolerant cache architecture for next-generation memory technologies

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