A multimode 76-to-81GHz automotive radar transceiver with autonomous monitoring

Ginsburg, Brian; Subburaj, Karthik; Samala, Sreekiran; Ramasubramanian, Karthik; Singh, Jasbir; Bhatara, S.; Murali, Sriram; Breen, Dan; Moallem, Meysam; Dandu, Krishnanshu; Jalan, Saket; Nayak, Neeraj; Sachdev, Rittu; Prathapan, Indu; Bhatia, Karan; Davis, Tim; Seok, Eunyoung; Parthasarathy, Harikrishna; Chatterjee, Rohit; Srinivasan, Venkatesh; Giannini, Vito; Kumar, Arvind; Kulak, Ross; Ram, Shankar; Gupta, Pankaj; Parkar, Zahir; Bhardwaj, Sachin; Rakesh, Y. C.; Rajagopal, Karthik; Shrimali, Arun; Rentala, Vijay

doi:10.1109/isscc.2018.8310232

Cited by 144 publications

(47 citation statements)

References 3 publications

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“…Strong nonlinear behaviors in MOSFETs can be captured by the modified Volterra series [32]. In this case, the nonlinearity is static in the i ds1 equation and can be represented by (2).…”

Section: Appendixmentioning

confidence: 99%

A Low-Noise Fractional-<inline-formula> <tex-math notation="LaTeX">${N}$ </tex-math> </inline-formula> Digital Frequency Synthesizer With Implicit Frequency Tripling for mm-Wave Applications

Zong

Chen

Staszewski

2019

IEEE J. Solid-State Circuits

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In this paper, we propose a 60-GHz fractional-N digital frequency synthesizer aimed at reducing its phase noise (PN) at both the flicker (1/f 3) and thermal (1/f 2) regions while minimizing its power consumption. The digitally controlled oscillator (DCO) fundamentally resonates at 20 GHz and co-generates a strong third harmonic at 60 GHz which is extracted to the output while canceling the 20-GHz fundamental. The latter component is fed back to the frequency dividers in an all-digital phase-locked loop for phase detection, which comprises a pair of digital-to-time and time-to-digital converters with dithering to attenuate fractional spurs. The mechanism of flicker noise upconversion to 1/f 3 PN in the DCO is investigated, and a reduction technique is proposed. The 28-nm CMOS prototype achieves 213-277-fs rms jitter in the 57.5-67.2-GHz tuning range while consuming only 40 mW. The DCO flicker PN corner is record low at 300-400 kHz.

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“…Strong nonlinear behaviors in MOSFETs can be captured by the modified Volterra series [32]. In this case, the nonlinearity is static in the i ds1 equation and can be represented by (2).…”

Section: Appendixmentioning

confidence: 99%

A Low-Noise Fractional-<inline-formula> <tex-math notation="LaTeX">${N}$ </tex-math> </inline-formula> Digital Frequency Synthesizer With Implicit Frequency Tripling for mm-Wave Applications

Zong

Chen

Staszewski

2019

IEEE J. Solid-State Circuits

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“…The frequency-modulated continuous wave (FMCW) Radar is a key sensing module of advanced driver assistance systems (ADAS) and autonomous vehicles due to its detection capability of long range and robustness to environment variations, such as inclement weather and extreme lighting scenarios [1]. In the past, automotive radars are generally realized using GaAs and SiGe processes due to its higher f T and f MAX and also lower 1=f noise.…”

Section: Introductionmentioning

confidence: 99%

A 76–81 GHz CMOS mmW quadrature down-conversion mixer for automotive radar applications

Rao

Shi

Zhang

2020

IEICE Electron. Express

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This paper presents a mmW quadrature down-conversion mixer for 76-81 GHz automotive radar applications. A transformer-based g m-boosting method and a new cascode inter-stage network are proposed to improve the gain of preamplifier. A pair of cross-coupled transistors are exploited to bleed dynamic current into mixer core to reduce noise figure while utilizing its negative resistance to improve conversion gain. The mixer is implemented in a 55-nm CMOS process and the measurement results show that the BW −3dB is 5.5 GHz, the peak gain is 4.1 dB with <0.16 dB I/Q mismatch, the input P1dB is up to −6 dBm and the minimum noise figure (NF min) is 19 dB while dissipating 40 mW of power. The achieved FOM is up to 0.02.

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“…Unlike more traditional radar schemes that use pulses and operate in the MHz-or lower GHz-range, FMCW radar for the K-or W-bands offers lower power consumption and can be realized with much smaller form factors. Advances in silicon technology and the increasing demand for powerefficient, compact and low-cost high-frequency FMCW radar have motivated research on single-chip waveform synthesizers [3]- [5] and fully-integrated transceiver systems [6]- [8].…”

Section: Introductionmentioning

confidence: 99%

Design Considerations for Integrated Radar Chirp Synthesizers

et al. 2019

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Phase-locked loops (PLLs) effectively generate frequency chirps for frequency-modulated continuous-wave (FMCW) radar and are ideal for integrated circuit implementations. This paper discusses the design requirements for integrated PLLs used as chirp synthesizers for FMCW radar and focuses on an analysis of the radar performance based on the PLL configuration. The fundamental principles of the FMCW radar are reviewed, and the importance of low synthesizer phase noise for reliable target detection is quantified. This paper provides guidance for the design of chirp synthesizer PLLs by analyzing the impact of the PLL configuration on the accuracy and reliability of the radar. The presented analysis approach allows for a straightforward study of the radar performance and quantifies the optimal settings of a PLL-based chirp synthesizer for a given application scenario, while the developed methodology can be easily applied to other scenarios. A novel digital chirp synthesizer PLL design that meets the requirements of FMCW radar is presented. The synthesizer prototype fabricated in 65-nm CMOS drives a radar testbed to verify the effectiveness of the synthesizer design in a complete FMCW radar system. INDEX TERMS Chirp linearity, chirp synthesis, frequency-modulated continuous-wave (FMCW) radar, fully-integrated chirp synthesizer, phase locked loop (PLL), phase noise, PLL bandwidth, radar testbed.

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A multimode 76-to-81GHz automotive radar transceiver with autonomous monitoring

Cited by 144 publications

References 3 publications

A Low-Noise Fractional-<inline-formula> <tex-math notation="LaTeX">${N}$ </tex-math> </inline-formula> Digital Frequency Synthesizer With Implicit Frequency Tripling for mm-Wave Applications

A Low-Noise Fractional-<inline-formula> <tex-math notation="LaTeX">${N}$ </tex-math> </inline-formula> Digital Frequency Synthesizer With Implicit Frequency Tripling for mm-Wave Applications

A 76–81 GHz CMOS mmW quadrature down-conversion mixer for automotive radar applications

Design Considerations for Integrated Radar Chirp Synthesizers

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