A Multichip Pulse-Based Neuromorphic Infrastructure and Its Application to a Model of Orientation Selectivity

Chicca, Elisabetta; Whatley, Adrian M.; Lichtsteiner, P.; Dante, Vittorio; Delbrück, Tobi; Giudice, Paolo Del; Douglas, Rodney J.; Indiveri, Giacomo

doi:10.1109/tcsi.2007.893509

Cited by 122 publications

(79 citation statements)

References 47 publications

(56 reference statements)

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“…A common goal is to integrate large numbers of these circuits on single chips, or even full wafers, and create large networks of neurons, densely interconnected. In these systems, the strategy used to connect multiple neurons with each other is to use asynchronous digital circuits that map and route the spikes as they are generated to other neurons on different chips or other areas of the same chip/wafer [14], [15]. It is therefore crucial to develop compact low-power circuits, that implement faithful models of real neurons, but that can also produce extremely fast digital pulses required by the asynchronous circuits that manage the communication infrastructure.…”

Section: Introductionmentioning

confidence: 99%

A current-mode conductance-based silicon neuron for address-event neuromorphic systems

Livi

Indiveri

2009

2009 IEEE International Symposium on Circuits and Systems

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105

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A current-mode conductance-based silicon neuron for address-event neuromorphic systems Livi, P; Indiveri, G Livi, P; Indiveri, G (2009 A current-mode conductance-based silicon neuron for address-event neuromorphic systems AbstractSilicon neuron circuits emulate the electrophysiological behavior of real neurons. Many circuits can be integrated on a single very large scale integration (VLSI) device, and form large networks of spiking neurons. Connectivity among neurons can be achieved by using time multiplexing and fast asynchronous digital circuits. As the basic characteristics of the silicon neurons are determined at design time, and cannot be changed after the chip is fabricated, it is crucial to implement a circuit which represents an accurate model of real neurons, but at the same time is compact, low-power and compatible with asynchronous logic. Here we present a current-mode conductance-based neuron circuit, with spike-frequency adaptation, refractory period, and bio-physically realistic dynamics which is compact, low-power and compatible with fast asynchronous digital circuits.A current-mode conductance-based silicon neuron for Address-Event neuromorphic systems bstract-Silicon neuron circuits emulate the electrophysiological behavior of real neurons. Many circuits can be integrated on a single Very Large Scale Integration VLSI) device, and form large networks of spiking neurons. Connectivity among neurons can be achieved by using time multiplexing and fast asynchronous digital circuits. As the basic characteristics of the silicon neurons are determined at design time, and cannot be changed after the chip is fabricated, it is crucial to implement a circuit which represents an accurate model of real neurons, but at the same time is compact, low-power and compatible with asynchronous logic. Here we present a current-mode conductancebased neuron circuit, with spike-frequency adaptation, refractory period, and bio-physically realistic dynamics which is compact, low-power and compatible with fast asynchronous digital circuits.

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Section: Introductionmentioning

confidence: 99%

A current-mode conductance-based silicon neuron for address-event neuromorphic systems

Livi

Indiveri

2009

2009 IEEE International Symposium on Circuits and Systems

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105

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“…The address of the sending element is conveyed as a parallel word of sufficient length, while the handshaking control signals require only two lines. Systems containing more than two AER chips can be constructed by implementing additional special purpose off-chip arbitration schemes and custom digital logic circuits [16], [17].…”

Section: B the Address-event Representationmentioning

confidence: 99%

Online spatio-temporal pattern recognition with evolving spiking neural networks utilising address event representation, rank order, and temporal spike learning

Dhoble

Nuntalid

Indiveri

et al. 2012

The 2012 International Joint Conference on Neural Networks (IJCNN)

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Evolving spiking neural networks (eSNN) are computational models that evolve new spiking neurons and new connections from incoming data to learn patterns from them in an on-line mode. With the development of new techniques to capture spatio-and spectro-temporal data in a fast on-line mode, using for example address event representation (AER) such as the implemented one in the artificial retina and the artificial cochlea chips, and with the available SNN hardware technologies, new and more efficient methods for spatio-temporal pattern recognition (STPR) are needed. The paper introduces a new eSNN model dynamic eSNN (deSNN), that utilises both rank-order spike coding (ROSC), also known as time to first spike, and temporal spike coding (TSC). Each of these representations are implemented through different learning mechanisms -RO learning, and temporal spike learning -spike driven synaptic plasticity (SDSP) rule. The deSNN model is demonstrated on a small scale moving object classification problem when AER data is collected with the use of an artificial retina camera. The new model is superior in terms of learning time and accuracy for learning. It makes use of the order of spikes input information which is explicitly present in the AER data, while a temporal spike learning rule accounts for any consecutive spikes arriving on the same synapse that represent temporal components in the learned spatio-temporal pattern. Abstract-Evolving spiking neural networks (eSNN) are computational models that evolve new spiking neurons and new connections from incoming data to learn patterns from them in an on-line mode. With the development of new techniques to capture spatio-and spectro-temporal data in a fast on-line mode, using for example address event representation (AER) such as the implemented one in the artificial retina and the artificial cochlea chips, and with the available SNN hardware technologies, new and more efficient methods for spatio-temporal pattern recognition (STPR) are needed. The paper introduces a new eSNN model dynamic eSNN (deSNN), that utilises both rankorder spike coding (ROSC), also known as time to first spike, and temporal spike coding (TSC). Each of these representations are implemented through different learning mechanisms -RO learning, and temporal spike learning -spike driven synaptic plasticity (SDSP) rule. The deSNN model is demonstrated on a small scale moving object classification problem when AER data is collected with the use of an artificial retina camera. The new model is superior in terms of learning time and accuracy for learning. It makes use of the order of spikes input information which is explicitly present in the AER data, while a temporal spike learning rule accounts for any consecutive spikes arriving on the same synapse that represent temporal components in the learned spatio-temporal pattern.

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“…Approximations to the retinal system itself have been implemented in hardware [1], as well as approximations to the motion detection and orientation selectivity algorithms that are present in living neural systems [2,3]. To theoretically back up the development of these devices, many models for early visual system functionalities have also been presented so far [4,5,6].…”

Section: Introductionmentioning

confidence: 99%

“…Among these operations, orientation selectivity is particularly difficult. As an example, a hardware device that uses two FPGAs for the implementation of visual cortex orientation tuning was shown in [3]. See also [13] for a digital implementation of similar orientation filters.…”

Section: Introductionmentioning

confidence: 99%

Implementation of a Biologically Inspired Diffusive Filling-In Algorithm for Focal-Plane Image Processing Applications

Santos¹,

Gomes²

2016

Anais Do 11. Congresso Brasileiro De Inteligência Computacional

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Abstract-The investigation of electronic devices as a replacement for the biological retina has achieved considerable interest over the last years. Tests of retinal prostheses in living patients have led to encouraging results. Such devices can be thought of as image sensors which are created with CMOS technology. Thanks to CMOS fabrication techniques, signal processing hardware can be integrated at the same silicon area where the light sensors are located. The signals generated on the retina are used by different neural mechanisms which are responsible for visual perception, motion detection, depth map construction, and so forth. The knowledge of how these neural mechanisms work, and how they interact with the retina, will enable the development of prostheses for parts of the neural visual system beyond the retina. An interesting feature of the visual system which has not been exploited in terms of hardware is the diffusive filling-in mechanism. It is believed that this mechanism enables the perceptual reconstruction of surfaces. In this work we investigate the implementation of the filling-in mechanism details. Our goal is to gather information that will be useful for the development of hardware devices with features similar to those found in this visual perception mechanism.

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A Multichip Pulse-Based Neuromorphic Infrastructure and Its Application to a Model of Orientation Selectivity

Cited by 122 publications

References 47 publications

A current-mode conductance-based silicon neuron for address-event neuromorphic systems

A current-mode conductance-based silicon neuron for address-event neuromorphic systems

Online spatio-temporal pattern recognition with evolving spiking neural networks utilising address event representation, rank order, and temporal spike learning

Implementation of a Biologically Inspired Diffusive Filling-In Algorithm for Focal-Plane Image Processing Applications

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