2020 33rd International Conference on VLSI Design and 2020 19th International Conference on Embedded Systems (VLSID) 2020
DOI: 10.1109/vlsid49098.2020.00048
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A Mathematical Approach Towards Quantization of Floating Point Weights in Low Power Neural Networks

Joydeep Kumar Devnath
1
,
Neelam Surana
2
,
Joycee Mekie
3
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Cited by 5 publications
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Hardware-Software Co-Design of a Collaborative DNN Accelerator for 3D Stacked Memories with Multi-Channel Data

Glint,
Awasthi,
Mekie
2024
2024 29th Asia and South Pacific Design Automation Conference (ASP-DAC)
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Hardware-Software Co-Design of a Collaborative DNN Accelerator for 3D Stacked Memories with Multi-Channel Data

Glint,
Awasthi,
Mekie
2024
2024 29th Asia and South Pacific Design Automation Conference (ASP-DAC)
0
0
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Fast and Low-Power Quantized Fixed Posit High-Accuracy DNN Implementation

Walia
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Tej
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Kabra
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et al. 2022
IEEE Trans. VLSI Syst.
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Mixed-8T: Energy-Efficient Configurable Mixed-VT SRAM Design Techniques for Neural Networks

Surana
1
,
Bharti
2
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Tej
3
et al. 2022
2022 35th International Conference on VLSI Design and 2022 21st International Conference on Embedded Systems (VLSID)
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