2012
DOI: 10.1109/jssc.2012.2191032
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A Fully Digital Delay Line Based GHz Range Multimode Transmitter Front-End in 65-nm CMOS

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Cited by 55 publications
(23 citation statements)
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“…In baseband PWM transmitters [57,[67][68][69][70][71][72], the amplitude information of the input signal is encoded into a PWM signal of frequency ω IF and mixed with a phase modulated carrier signal of frequency ω c to generate the transmit signal. Baseband PWM transmitters are also referred to as polar PWM transmitters (PPWMTs) and its block diagram is shown in Figure 3.1.…”
Section: Baseband Pwm Transmittersmentioning
confidence: 99%
“…In baseband PWM transmitters [57,[67][68][69][70][71][72], the amplitude information of the input signal is encoded into a PWM signal of frequency ω IF and mixed with a phase modulated carrier signal of frequency ω c to generate the transmit signal. Baseband PWM transmitters are also referred to as polar PWM transmitters (PPWMTs) and its block diagram is shown in Figure 3.1.…”
Section: Baseband Pwm Transmittersmentioning
confidence: 99%
“…The envelope path, including a digital PWM [3] with the quantization level of 256 and IF clock f IF of 3.25 MHz, an inverter-chain based driver buffer with a perfect push-pull dead zone, a complementary power switch with low on resistor, and a 2 nd -order LC filter with a cutoff frequency of 1MHz, performs the mapping from multi-bit digital envelope to the pulse-width of the IF clock, which is then low-pass filtered to generate the analog envelope at the PA supply. The large-sized power switch consisting of complementary power transistors, works in class-D mode with 0.3ns dead zone to provide large-current driver capability for the PA supply.…”
Section: Architecturementioning
confidence: 99%
“…2 shows the proposed envelope path, employing a digital IF PWM based open-loop power switch followed by an LC filter. The principle and design of digital IF PWM, based on delay multiplexer with inverter based delay line and unit-delay auto-calibration, has been clearly clarified in [3]. By employing an L-level quantizer and an L-stage delay line with an unit delay of 1/(2L×f IF ), the multi-bit baseband envelope components are equidistantly quantized to L discrete values and mapped to L discrete rising-edge lags, and correspond to L discrete pulse-widths of the IF clock, which are lowpass filtered to reconstruct the analog envelope components at the PA supply with large-current driver capability provided by the class-D power switch.…”
Section: Design Implementationmentioning
confidence: 99%
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“…The polar PWM transmitter (PPWMT) [62][63][64][65] have a larger dynamic range at high carrier frequency as it does not suffer from pulse swallowing in PAs [48]. In the PPWMT, the non-constant envelope signal is converted into carrier bursts of varying duration, which operate the PA in either on state achieving peak efficiency or the off state where no power consumed.…”
Section: Conceptmentioning
confidence: 99%