1995
DOI: 10.1109/12.392848
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A fast and robust network bisection algorithm

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Cited by 47 publications
(34 citation statements)
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“…The first such family of heuristics is hierarchical clustering [1,7,30,47,48]. The other group of partitioningrelated heuristics is the Kernighan-Lin heuristic [26], which was substantially improved by Fiduccia and Mattheyses [16], and later by many others [11,42]. These heuristics have been found to be appropriate for hardware/software partitioning as well [31,46,49].…”
Section: Previous Workmentioning
confidence: 99%
“…The first such family of heuristics is hierarchical clustering [1,7,30,47,48]. The other group of partitioningrelated heuristics is the Kernighan-Lin heuristic [26], which was substantially improved by Fiduccia and Mattheyses [16], and later by many others [11,42]. These heuristics have been found to be appropriate for hardware/software partitioning as well [31,46,49].…”
Section: Previous Workmentioning
confidence: 99%
“…Without balance criterion, we can find the optimal solution in polynomial time by maxflow-mincut algorithm [10]. In a roughly balanced bipartitioning problem, 10% of skewness is usually allowed [20]. Since it is NP-hard for general graphs [11], heuristic algorithms are used practically.…”
Section: Graph Bipartitioningmentioning
confidence: 99%
“…A number of iterative min-cut methods for graph or hypergraph partitioning have been previously proposed [16], [17], [23], [24], [29], [30]. Kernighan and Lin proposed the wellknown KL graph partitioning algorithm using pair swaps to improve a random initial two-way partition [23].…”
Section: Ery Large Scale Integration (Vlsi) Circuitmentioning
confidence: 99%
“…It gives better partitions than FM, but requires large amounts of memory, as will be discussed shortly, thus, rendering it infeasible or very slow (due to frequent page swaps) for use on medium-to large-size circuits. Some preclustering techniques have been proposed in [29] and [34] to remedy the weakness of FM and KL in getting trapped in local minima for large circuits; the techniques in [29] apply directly to graphs, though they may be extendible to hypergraphs. Very good results have been obtained at the cost of considerable CPU time increases and implementation complexities.…”
Section: Ery Large Scale Integration (Vlsi) Circuitmentioning
confidence: 99%
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